SLUSFN0A
April 2025 – December 2025
BQ25630
PRODUCTION DATA
1
1
Features
2
Applications
3
Description
4
Description (continued)
5
Device Comparison
6
Pin Configuration and Functions
7
Specifications
7.1
Absolute Maximum Ratings
7.2
ESD Ratings
7.3
Recommended Operating Conditions
7.4
Thermal Information
7.5
Electrical Characteristics
7.6
Timing Requirements
7.7
Typical Characteristics
8
Detailed Description
8.1
Overview
8.2
Functional Block Diagram
8.3
Feature Description
8.3.1
Power-On-Reset (POR)
8.3.2
Device Power Up from Battery
8.3.3
USB-C Detection
8.3.3.1
Legacy Adapter Detection
8.3.3.2
USB-C Dead Battery Mode
8.3.3.3
SNK Mode
8.3.3.4
SRC Mode
8.3.3.5
DRP Mode - Dual Role Port
8.3.3.6
USB-C Debug Accessory Detection
8.3.4
Device Power Up from Input Source
8.3.4.1
REGN LDO Power Up
8.3.4.2
D+/D– Detection Sets Input Current Limit
8.3.4.3
Input Voltage Limit Threshold Setting (VINDPM Threshold)
8.3.4.4
Converter Power-Up
8.3.4.5
Input Current Optimizer (ICO)
8.3.4.6
Switching Frequency and Dithering Feature
8.3.5
Power Path Management
8.3.5.1
Narrow VDC Architecture
8.3.5.2
Dynamic Power Management
8.3.5.3
High Impedance (HIZ) Mode
8.3.6
Battery Charging Management
8.3.6.1
Autonomous Charging Cycle
8.3.6.2
Battery Charging Profile
8.3.6.3
Charging Termination
8.3.6.4
Thermistor Qualification
8.3.6.4.1
Advanced Temperature Profile in Charge Mode
8.3.6.4.2
TS Pin Thermistor Configuration
8.3.6.4.3
Cold/Hot Temperature Window in OTG Mode
8.3.6.4.4
JEITA Charge Rate Scaling
8.3.6.5
Charging Safety Timers
8.3.6.6
Alternate Power from Input
8.3.7
USB On-The-Go (OTG)
8.3.7.1
Boost OTG Mode
8.3.8
Integrated 12-bit ADC for Monitoring
8.3.9
Status Outputs (INT , PG )
8.3.9.1
PG Pin Power Good Indicator
8.3.9.2
Interrupts and Status, Flag, and Mask Bits
8.3.9.3
Interrupt to Host (INT)
8.3.10
BATFET Control
8.3.10.1
Shutdown Mode
8.3.10.2
Ship Mode
8.3.10.3
Standby Mode
8.3.10.4
System Power Reset
8.3.11
Protections
8.3.11.1
Voltage and Current Monitoring in Battery Only and HIZ Modes
8.3.11.1.1
Battery Overcurrent Protection
8.3.11.1.2
Battery Undervoltage Lockout
8.3.11.2
Voltage and Current Monitoring in Buck Mode
8.3.11.2.1
Input Overvoltage
8.3.11.2.2
System Overvoltage Protection (SYSOVP)
8.3.11.2.3
Forward Converter Cycle-by-Cycle Current Limit
8.3.11.2.4
System Short
8.3.11.2.5
Battery Overvoltage Protection (BATOVP)
8.3.11.2.6
Sleep Comparator
8.3.11.3
Voltage and Current Monitoring in Boost Mode
8.3.11.3.1
Boost Mode Overvoltage Protection
8.3.11.3.2
Boost Mode Duty Cycle Protection
8.3.11.3.3
Boost Mode PMID Undervoltage Protection
8.3.11.3.4
Boost Mode Battery Undervoltage
8.3.11.3.5
Boost Converter Cycle-by-Cycle Current Limit
8.3.11.3.6
Boost Mode SYS Short
8.3.11.4
Thermal Regulation and Thermal Shutdown
8.3.11.4.1
Thermal Protection in Buck Mode
8.3.11.4.2
Thermal Protection in Boost Mode
8.3.11.4.3
Thermal Protection in Battery-only Mode
8.3.11.5
Liquid Detection and Corrosion Mitigation (Patent Pending)
8.4
Device Functional Modes
8.4.1
Host Mode and Default Mode
8.4.2
Register Bit Reset
8.5
Programming
8.5.1
Serial Interface
8.5.1.1
Data Validity
8.5.1.2
START and STOP Conditions
8.5.1.3
Byte Format
8.5.1.4
Acknowledge (ACK) and Not Acknowledge (NACK)
8.5.1.5
Target Address and Data Direction Bit
8.5.1.6
Single Write and Read
8.5.1.7
Multi-Write and Multi-Read
8.6
Register Maps
8.6.1
Register Programming
8.6.2
BQ25630 Registers
9
Application and Implementation
9.1
Application Information
9.2
Typical Application
9.2.1
Design Requirements
9.2.2
Detailed Design Procedure
9.2.2.1
Inductor Selection
9.2.2.2
Input Capacitor
9.2.2.3
Output Capacitor
9.2.3
Application Curves
9.3
Power Supply Recommendations
9.4
Layout
9.4.1
Layout Guidelines
9.4.2
Layout Example
10
Device and Documentation Support
10.1
Device Support
10.1.1
Third-Party Products Disclaimer
10.2
Documentation Support
10.2.1
Related Documentation
10.3
Receiving Notification of Documentation Updates
10.4
Support Resources
10.5
Trademarks
10.6
Electrostatic Discharge Caution
10.7
Glossary
11
Revision History
12
Mechanical, Packaging, and Orderable Information
1
Features
High-efficiency
5A
, 1.5MHz, synchronous switch mode buck charger for single cell battery
>90% efficiency down to 10mA output current from 5V input
Charge current up to
5A
in 20mA steps
Charge termination from 30 to 1000mA in 10mA steps
Highly configurable JEITA profile for safe charging over temperature
Fully Integrated CC Controller
with Dual Role Power (DRP), Try.SNK and Try.SRC
BATFET control to support shutdown, ship mode and full system reset
1.5μA quiescent current in battery only mode
0.15μA battery leakage current in ship mode
0.1μA battery leakage current in shutdown mode
Supports USB On-The-Go (OTG)
and SRC mode
Reverse mode with 3.84V to
9.6V
output
Programmable current limit up to 3.2A
Supports a wide range of input sources
3.9V to 18V input operating voltage range with 26V absolute max input voltage
Supports USB Type-C inputs, USB BC1.2, HVDCP, and Non-Standard Adapters
Supports IINDPM Range from 10mA to 3.2A
API (Alternate Power from Input) mode for low power input sources down to 10mA
VINDPM automatically tracks battery voltage
Input Current Optimizer (ICO) maximizes input power without overloading adapters
Efficient battery operation with 7mΩ BATFET
Narrow VDC (NVDC) power path management
System instant-on with depleted or no battery
Battery supplement when adapter is fully loaded
Flexible autonomous or I
2
C-controlled modes
Integrated 12-bit ADC for voltage, current, and temperature monitoring
High accuracy
±0.5% charge voltage regulation
±5% charge current regulation
±5% input current regulation
Safety
Liquid detection and corrosion mitigation (Patent Pending)
Thermal regulation and thermal shutdown
Input/system/battery overvoltage and overcurrent protection
Charging safety timer