SLUSG21A May   2025  – September 2025 UCC25661

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Device Comparison Table
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
    7. 6.7 Typical Characteristics
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Input Power Proportional Control
        1. 7.3.1.1 Voltage Feedforward
      2. 7.3.2 VCR Synthesizer
        1. 7.3.2.1 TSET Programming
      3. 7.3.3 Feedback Chain (Control Input)
      4. 7.3.4 Adaptive Dead-Time
      5. 7.3.5 Input Voltage Sensing
        1. 7.3.5.1 Brownin and Brownout Thresholds and Options
        2. 7.3.5.2 AC Input Zero Crossing Detection
        3. 7.3.5.3 Output OVP and External OTP
      6. 7.3.6 Resonant Tank Current Sensing
    4. 7.4 Protections
      1. 7.4.1 Zero Current Switching (ZCS) Protection
      2. 7.4.2 Minimum Current Turn-off During Soft Start
      3. 7.4.3 Cycle by Cycle Current Limit and Short Circuit Protection
      4. 7.4.4 Overload (OLP) Protection
      5. 7.4.5 VCC OVP Protection
    5. 7.5 Device Functional Modes
      1. 7.5.1 Startup
        1. 7.5.1.1 With HV Start-up
          1. 7.5.1.1.1 First Time Start-up Sequence
          2. 7.5.1.1.2 Restart Sequence
        2. 7.5.1.2 Without HV Startup
      2. 7.5.2 Soft Start Ramp
        1. 7.5.2.1 Startup Transition to Regulation
      3. 7.5.3 Light Load Management
        1. 7.5.3.1 Operating Modes (Burst Pattern)
        2. 7.5.3.2 Mode Transition Management
        3. 7.5.3.3 Burst Mode Thresholds Programming
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1  LLC Power Stage Requirements
        2. 8.2.2.2  LLC Gain Range
        3. 8.2.2.3  Select Ln and Qe
        4. 8.2.2.4  Determine Equivalent Load Resistance
        5. 8.2.2.5  Determine Component Parameters for LLC Resonant Circuit
        6. 8.2.2.6  LLC Primary-Side Currents
        7. 8.2.2.7  LLC Secondary-Side Currents
        8. 8.2.2.8  LLC Transformer
        9. 8.2.2.9  LLC Resonant Inductor
        10. 8.2.2.10 LLC Resonant Capacitor
        11. 8.2.2.11 LLC Primary-Side MOSFETs
        12. 8.2.2.12 Design Considerations for Adaptive Dead-Time
        13. 8.2.2.13 LLC Rectifier Diodes
        14. 8.2.2.14 LLC Output Capacitors
        15. 8.2.2.15 HV Pin Series Resistors
        16. 8.2.2.16 BLK Pin Voltage Divider
        17. 8.2.2.17 ISNS Pin Differentiator
        18. 8.2.2.18 TSET Pin
        19. 8.2.2.19 OVP/OTP Pin
        20. 8.2.2.20 Burst Mode Programming
      3. 8.2.3 Application Curves
    3. 8.3 Power Supply Recommendations
      1. 8.3.1 VCCP Pin Capacitor
      2. 8.3.2 Boot Capacitor
      3. 8.3.3 V5P Pin Capacitor
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
        1. 8.4.2.1 Schematics
  10. 9 Device and Documentation Support
    1. 9.1 Receiving Notification of Documentation Updates
    2. 9.2 Support Resources
    3. 9.3 Trademarks
    4. 9.4 Electrostatic Discharge Caution
    5. 9.5 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

7.3.1 Input Power Proportional Control

The previous generation of TI LLC controllers use a version of charge control called hybrid hysteresis control (HHC). An improved version of the HHC, called input power proportional control (IPPC), is used in the UCC25661 LLC controller. Compared to traditional direct frequency control, where the control signal is proportional to the switching frequency, traditional charge control methods deliver faster transient response while simplifying compensator design as the power stage transfer function becomes a first order system. In traditional charge control, the control signal is determined by both input current and switching frequency. IPPC significantly reduces the control signals dependency on switching frequency, thereby minimizing the impact of input and output voltage variations.

IPPC brings in the following advantages:

  • Makes control signal proportional to input power.
  • Consistent burst mode and over load performance in wide LLC (WLLC) operation application.
  • Retains faster load transient performance and improves line transient performance.

The UCC25661 measures the resonant tank current on the ISNS pin through an external differentiator formed by capacitor CISNS and resistor RISNS. The voltage on the ISNS pin is integrated in the VCR synthesizer block to form an internal VCR signal VCR_synth.The VCR Synthesizer block applies feed forward gain based on the BLK pin voltage, applies ramp compensation to generate the compensated internal VCR signal. The compensated internal VCR signal is then compared with two sets of thresholds to control the high side switch turn-off (VTH) and low side switch turn-off (VTL). The thresholds VTH and VTL are generated from the internal control signal FBReplica and the high-side and low-side switch on-time from the previous half switching cycle. During the soft start, the VTH and VTL thresholds are generated based on the internal soft start ramp to minimize the resonant tank inrush current during start-up.

In Figure 7-2, the high-side and low-side switches are controlled based on the internal VCR signal and comparator thresholds VTH and VTL. When the VCR is higher than VTH, the high-side switch is turned off. When VCR is lower than VTL, the low-side switch is turned off.

UCC25661 IPPC Basic waveformsFigure 7-2 IPPC Basic waveforms

Calculate the comparator thresholds VTH and VTL using the equations below. FBReplica is the internal voltage representation of the feedback pin (FB) current. Section 7.3.3 defines the feedback chain. Tsw is the period of a switching cycle. k is a constant.

Equation 1. VTH=VCM+k×FBReplica×Tsw÷2
Equation 2. VTL=VCM-k×FBReplica×Tsw÷2
Equation 3. VTH−VTL =∆VCR= k×FBReplica×Tsw