SLVSHI9A March   2025  – September 2025 TPS7H5020-SEP , TPS7H5020-SP

PRODMIX  

  1.   1
  2. Features
  3. Applications
  4. Description
  5. Device Comparison Table
  6. Pin Configuration and Functions
  7. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Quality Conformance Inspection
    7. 6.7 Typical Characteristics
  8. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  Input Voltage (VIN) and VLDO
      2. 7.3.2  Driver Input Voltage (PVIN)
      3. 7.3.3  Start-Up
      4. 7.3.4  Enable and Undervoltage Lockout (UVLO)
      5. 7.3.5  Voltage Reference
      6. 7.3.6  Error Amplifier
      7. 7.3.7  Output Voltage Programming
      8. 7.3.8  Soft Start (SS)
      9. 7.3.9  Switching Frequency and External Synchronization
        1. 7.3.9.1 Internal Oscillator Mode
        2. 7.3.9.2 External Synchronization Mode
          1. 7.3.9.2.1 External Synchronization with TPS7H5021
      10. 7.3.10 Duty Cycle Limit
      11. 7.3.11 Minimum On-Time and Off-Time
      12. 7.3.12 Pulse Skipping
      13. 7.3.13 Leading Edge Blank Time
      14. 7.3.14 Current Sense and PWM Generation (CS_ILIM)
      15. 7.3.15 Gate Driver Output
      16. 7.3.16 Unpowered Voltage Clamp
      17. 7.3.17 Sourcing Driver Return (OUTH_REF)
      18. 7.3.18 Slope Compensation (RSC)
      19. 7.3.19 Frequency Compensation
      20. 7.3.20 Thermal Shutdown
    4. 7.4 Device Functional Modes
  9. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1  Switching Frequency
        2. 8.2.2.2  Output Voltage Programming Resistor Selection
        3. 8.2.2.3  Driver PVIN Configuration
        4. 8.2.2.4  Soft-Start Capacitor Selection
        5. 8.2.2.5  Transformer Design
        6. 8.2.2.6  Primary Power Switch Selection
        7. 8.2.2.7  Output Diode Selection
        8. 8.2.2.8  RCD Clamp
        9. 8.2.2.9  Output Capacitance Selection
        10. 8.2.2.10 Current Sense Resistor
        11. 8.2.2.11 Frequency Compensation Component Selection
      3. 8.2.3 Application Curves
      4. 8.2.4 Boost Converter
      5. 8.2.5 Feedback Isolation Using ISOS510
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  10. Device and Documentation Support
    1. 9.1 Documentation Support
      1. 9.1.1 Related Documentation
    2. 9.2 Receiving Notification of Documentation Updates
    3. 9.3 Support Resources
    4. 9.4 Trademarks
    5. 9.5 Electrostatic Discharge Caution
    6. 9.6 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

Minimum On-Time and Off-Time

The TPS7H502x output has a minimum on-time of approximately 135ns (typical). The minimum on-time is the smallest time duration for which the output remains in the on-state. As such, the minimum on-time can impose a restraint on the input-to-output conversion ratio of the power converter design. To overcome minimum on-time restrictions, careful selection of both the converter switching frequency and the transformer turns ratio (if applicable) is needed. For single switch forward, flyback, and boost converters in continuous conduction mode, the following equations can be used to check that the on time of the main power switch is sufficient for the intended design.

For forward:

Equation 11. ton_min<VOUT+VDVIN×NSP×fSW

where:

  • ton_min is the minimum on-time of the controller
  • VOUT is the desired output voltage of the converter
  • VIN is the input voltage of the converter
  • VD is the forward voltage of the rectifier diode
  • NPS is the primary-to-secondary turns ratio of the transformer
  • NSP is the secondary-to-primary turns ratio of the transformer (the inverse of NPS)
  • fSW is the desired switching frequency of the converter

For flyback:

Equation 12. ton_min<VOUT+VD×NPSVIN+VOUT+VD×NPS×fSW

For boost:

Equation 13. ton_min<VOUT+VD-VINVOUT+VD×fSW

Likewise, the minimum off-time also imposes restrictions on the converter operation. The minimum off-time is the smallest time duration that the output must remain off before subsequent turn-on. If the output is turned off during the switching cycle due to normal PWM operation, the output remains in the off-state for at least 40ns (typical). In most applications, the duty cycle of the converter during steady state remains well below 100% and allows for the output to be off much longer than this duration. The minimum off-time for the controller is not a concern for the TPS7H5021 in which the duty cycle is restricted to a 50% nominal maximum.

There are circumstances in which the minimum off-time must be taken into consideration when using the TPS7H5020 in power converter designs. Specifically, such cases occur when duty cycle is near 100% and turn-off happens close to the beginning of the next switching cycle. The intended off-time in these applications, as dictated by the converter feedback loop, is less than the minimum off-time of the controller. As such, the minimum off-time duration of the controller delays the output turn-on in the following switching cycle. While this must be taken into account at all operational frequencies, the effect is more pronounced at higher frequencies in which the minimum off-time constitutes a higher portion of the switching period. For example, at 1MHz switching frequency, the turn-on of the next cycle is delayed if the duty cycle surpasses 96% (nominal). To maintain the expected operation of the converter during steady-state, a maximum duty cycle can be imposed by the user on the converter design as shown in Equation 14.

Equation 14. DMAX<1-toff_min×fSW

where:

  • DMAX is the recommended maximum converter duty cycle to avoid delayed turn-on in the next cycle
  • toff_min is the minimum off-time of the controller
  • fSW is the converter switching frequency