SLVSHI9A March   2025  – September 2025 TPS7H5020-SEP , TPS7H5020-SP

PRODMIX  

  1.   1
  2. Features
  3. Applications
  4. Description
  5. Device Comparison Table
  6. Pin Configuration and Functions
  7. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Quality Conformance Inspection
    7. 6.7 Typical Characteristics
  8. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  Input Voltage (VIN) and VLDO
      2. 7.3.2  Driver Input Voltage (PVIN)
      3. 7.3.3  Start-Up
      4. 7.3.4  Enable and Undervoltage Lockout (UVLO)
      5. 7.3.5  Voltage Reference
      6. 7.3.6  Error Amplifier
      7. 7.3.7  Output Voltage Programming
      8. 7.3.8  Soft Start (SS)
      9. 7.3.9  Switching Frequency and External Synchronization
        1. 7.3.9.1 Internal Oscillator Mode
        2. 7.3.9.2 External Synchronization Mode
          1. 7.3.9.2.1 External Synchronization with TPS7H5021
      10. 7.3.10 Duty Cycle Limit
      11. 7.3.11 Minimum On-Time and Off-Time
      12. 7.3.12 Pulse Skipping
      13. 7.3.13 Leading Edge Blank Time
      14. 7.3.14 Current Sense and PWM Generation (CS_ILIM)
      15. 7.3.15 Gate Driver Output
      16. 7.3.16 Unpowered Voltage Clamp
      17. 7.3.17 Sourcing Driver Return (OUTH_REF)
      18. 7.3.18 Slope Compensation (RSC)
      19. 7.3.19 Frequency Compensation
      20. 7.3.20 Thermal Shutdown
    4. 7.4 Device Functional Modes
  9. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1  Switching Frequency
        2. 8.2.2.2  Output Voltage Programming Resistor Selection
        3. 8.2.2.3  Driver PVIN Configuration
        4. 8.2.2.4  Soft-Start Capacitor Selection
        5. 8.2.2.5  Transformer Design
        6. 8.2.2.6  Primary Power Switch Selection
        7. 8.2.2.7  Output Diode Selection
        8. 8.2.2.8  RCD Clamp
        9. 8.2.2.9  Output Capacitance Selection
        10. 8.2.2.10 Current Sense Resistor
        11. 8.2.2.11 Frequency Compensation Component Selection
      3. 8.2.3 Application Curves
      4. 8.2.4 Boost Converter
      5. 8.2.5 Feedback Isolation Using ISOS510
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  10. Device and Documentation Support
    1. 9.1 Documentation Support
      1. 9.1.1 Related Documentation
    2. 9.2 Receiving Notification of Documentation Updates
    3. 9.3 Support Resources
    4. 9.4 Trademarks
    5. 9.5 Electrostatic Discharge Caution
    6. 9.6 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

Transformer Design

The turns ratio and primary inductance of the transformer are determined based on the target specifications of the converter. The turns ratio is calculated based on a maximum duty cycle of 35% targeted for the design.

Equation 39. NPS_MAX=VIN_MIN×DMAXVOUT+VD×1-DMAX
Equation 40. NPS_MAX=22V×0.355V+0.7×1-0.35=2.08

A turns ratio of 2 is selected for the design. Based on the actual turns ratio, the minimum and maximum duty cycle can be calculated.

Equation 41. DMIN=(VOUT+VD)×NPSVOUT+VD×NPS+VIN_MAX
Equation 42. DMIN=(5V+0.7V)×25V+0.7V×2+22V=0.241
Equation 43. DMAX=(VOUT+VD)×NPSVOUT+VD×NPS+VIN_MIN
Equation 44. DMAX=(5V+0.7V)×25V+0.7V×2+22V=0.341

The primary inductance was calculated based on a 20% current ripple.

Equation 45. LP=VIN_MAX2×DMIN2VOUT×IOUT×fSW×%RIPPLE
Equation 46. LP=36V2×0.2425V×4A×500kHz×0.2=37.3μH

The primary inductance selected for the actual design was 30µH, which results in an actual ripple of approximately 25%. The following equations detail how to calculate transformer primary and secondary currents that are critical for proper design of the transformer. These equations are useful for defining the physical structure of the transformer.

Equation 47. IRIPPLE=VOUT×IOUT×%RIPPLEVIN_MAX×DMIN
Equation 48. IRIPPLE=5V×4A×0.2536V×0.24=0.58A
Equation 49. IPRI_PEAK=VOUT×IOUTVIN_MIN×DMAX×η+IRIPPLE2
Equation 50. IPRI_PEAK=5V×4A22V×0.35×0.85+0.58A2=3.35A
Equation 51. IPRI_RMS=DMAX×(VOUT×IOUTVIN_MIN×DMAX)2+IRIPPLE23
Equation 52. IPRI_RMS=0.35×(5V×4A22V×0.35)2+0.58A23=1.57A
Equation 53. ISEC_RMS=1-DMAX×IOUT2+(IRIPPLE×NPS)23
Equation 54. ISEC_RMS=1-0.35×4A2+(0.58A×2)23=3.29A