SLVSHX5A July   2025  – December 2025 TPS2HC08-Q1

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Device Comparison Table
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 SNS Timing Characteristics
    7. 6.7 Switching Characteristics
    8. 6.8 Typical Characteristics
  8. 7 Parameter Measurement Information
  9. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1  Accurate Current Sense
        1. 8.3.1.1 SNS Response Time
        2. 8.3.1.2 SNS Output Filter
        3. 8.3.1.3 Multiplexing of Current Sense Across Channels
        4. 8.3.1.4 Multiplexing of Current Sense Across Devices
      2. 8.3.2  Overcurrent Protection
        1. 8.3.2.1 Adjustable Current Limit
          1. 8.3.2.1.1 Current Limiting With Thermal Regulation
          2. 8.3.2.1.2 Current Limiting With No Thermal Regulation
          3. 8.3.2.1.3 Current Limit Foldback
          4. 8.3.2.1.4 Current Limit Accuracy
        2. 8.3.2.2 Thermal Shutdown
          1. 8.3.2.2.1 Relative Thermal Shutdown
          2. 8.3.2.2.2 Absolute Thermal Shutdown
      3. 8.3.3  Retry Protection Mechanism From Thermal Shutdown
        1. 8.3.3.1 Reliable Switch-On Behavior
      4. 8.3.4  Inductive-Load Switching-Off Clamp
      5. 8.3.5  Slower Slew Rate Option
      6. 8.3.6  Capacitive Load Charging
        1. 8.3.6.1 Adjustable Current Limiting for Inrush Control
        2. 8.3.6.2 Current Limit with Thermal Regulation for Capacitive Loads
        3. 8.3.6.3 Retry Thermal Shutdown Behavior for Capacitive Loads
        4. 8.3.6.4 Impact of DC Load on Capacitive Charging Capability
        5. 8.3.6.5 Device Capability
      7. 8.3.7  Bulb Charging
        1. 8.3.7.1 Non-Thermal Regulated Mode for Bulb Loads
        2. 8.3.7.2 Thermal Management During Bulb Inrush
        3. 8.3.7.3 Device Capability
      8. 8.3.8  Fault Detection and Reporting
        1. 8.3.8.1 Diagnostic Enable Function
        2. 8.3.8.2 FLT Reporting
        3. 8.3.8.3 FLT Timings
        4. 8.3.8.4 Fault Table
      9. 8.3.9  Full Diagnostics
        1. 8.3.9.1 Open-Load Detection
          1. 8.3.9.1.1 Channel On
          2. 8.3.9.1.2 Channel Off
        2. 8.3.9.2 Short-to-Battery Detection
        3. 8.3.9.3 Reverse-Polarity and Battery Protection
      10. 8.3.10 Full Protections
        1. 8.3.10.1 UVLO Protection
        2. 8.3.10.2 Loss of GND Protection
        3. 8.3.10.3 Loss of Power Supply Protection
        4. 8.3.10.4 Reverse Current Protection
        5. 8.3.10.5 Protection for MCU I/Os
    4. 8.4 Device Functional Modes
  10. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 EMC Transient Disturbances Test
      3. 9.2.3 Transient Thermal Performance
      4. 9.2.4 Application Curves
    3. 9.3 Power Supply Recommendations
    4. 9.4 Layout
      1. 9.4.1 Layout Guidelines
      2. 9.4.2 Layout Examples
        1. 9.4.2.1 Without a GND Network
        2. 9.4.2.2 With a GND Network
      3. 9.4.3 Wettable Flank Package
  11. 10Device and Documentation Support
    1. 10.1 Third-Party Products Disclaimer
    2. 10.2 Receiving Notification of Documentation Updates
    3. 10.3 Support Resources
    4. 10.4 Trademarks
    5. 10.5 Electrostatic Discharge Caution
    6. 10.6 Glossary
  12. 11Revision History
  13. 12Mechanical, Packaging, and Orderable Information

8.3.1.1 SNS Response Time

Some applications can operate with a high frequency, low duty cycle PWM. Such applications require fast settling of the SNS output. For example, a 250Hz, 5% duty cycle PWM has an on-time of only 200µs. The microcontroller ADC can sample the SNS signal after the defined settling time. The following figures shows response time of SNS signal with EN and DIAG_EN being pulled high respectively. The fast response time of the device SNS signal easily allows current sense read by ADC in such applications.

TPS2HC08-Q1 SNS Response Time with DIAG_EN (tSNSION1)Figure 8-5 SNS Response Time with DIAG_EN (tSNSION1)
TPS2HC08-Q1 SNS Response Time with EN (tSNSION3)Figure 8-6 SNS Response Time with EN (tSNSION3)
Note:

Rise and fall times of control signals are 100ns. Control signals include: ENx, DIAG_EN and SEL. Both the channels have same sense timings with appropriate SEL setting.

TPS2HC08-Q1 SNS Settling Time From EN or DIAG_EN Figure 8-7 SNS Settling Time From EN or DIAG_EN
TPS2HC08-Q1 SNS Settling Time From Load step Figure 8-8 SNS Settling Time From Load step
TPS2HC08-Q1 SNS Settling Time From Switching From CHx to CHy Figure 8-9 SNS Settling Time From Switching From CHx to CHy