SNAU305 February   2025 LMH1229 , LMH1239

 

  1.   1
  2.   LMH1229 and LMH1239 Programming Guide
  3.   Trademarks
  4. 1Access Methods
    1. 1.1 Register Programming Through SMBus
    2. 1.2 Register Programming Through SPI
    3. 1.3 Register Pages
  5. 2Register Command Syntax
  6. 3Device Configurations
    1. 3.1  Common Device Configuration
    2. 3.2  Common Register Commands
      1. 3.2.1 Channel Control
      2. 3.2.2 LMH12x9 Resets
        1. 3.2.2.1 LMH12x9 ENABLE Pin Override
        2. 3.2.2.2 LMH12x9 Share, CDR, and EQ/Drivers Page Resets
    3. 3.3  IN_MUX_SEL Override
    4. 3.4  Signal Detect Status for SDI_IN± and SDI_IN1±
      1. 3.4.1 Force Signal Detect Power Down
    5. 3.5  Lock Data Rate Indication
    6. 3.6  CDR Loop Bandwidth Override
    7. 3.7  Selective SMPTE Data Rate Lock
      1. 3.7.1 Digital Mute Reference Threshold
      2. 3.7.2 CTLE Index Check and Manual CTLE Override
    8. 3.8  Eye Opening Monitoring Operation
      1. 3.8.1 Fast EOM
        1. 3.8.1.1 Fast EOM Operation
      2. 3.8.2 Read Horizontal and Vertical Eye Opening
    9. 3.9  SDI_OUT±, OUT0± and OUT1± Default Mode of Operation
      1. 3.9.1 SDI_OUT±, OUT0± and OUT1± Independent Control
    10. 3.10 Invert OUT0±, OUT1±, and SDI_OUT± Data Polarity
    11. 3.11 OUT0±, OUT1±, and SDI_OUT± Driver Settings
      1. 3.11.1 OUT0± and OUT1± VOD Settings
      2. 3.11.2 OUT0± and OUT1± De-Emphasis Settings
      3. 3.11.3 SDI_OUT± VOD Settings
      4. 3.11.4 SDI_OUT± Pre-Emphasis
      5. 3.11.5 Output Driver Power Down
      6. 3.11.6 Cable Fault Detection (CFD)
    12. 3.12 LOCK_N Pin Output Settings
      1. 3.12.1 Interrupt Outputs Programmed by Interrupt Registers
    13. 3.13 PRBS Generator and Checker
    14. 3.14 CDR Lock Timing Control
      1. 3.14.1 Watchdog Timer
  7. 4Register Maps
    1. 4.1 Share Registers
    2. 4.2 CDR Registers
    3. 4.3 EQ_Drivers Registers

Fast EOM Operation

The following steps use Fast EOM to perform an eye capture for the 64 × 64 matrix.

Table 3-22 Eye Opening Monitor (EOM)
COMMANDREGISTERVALUEMASK//COMMENTS
RAWFF00

FF

//Select Share Register Page
RAW

0B

02

02

//Force enable VCO clock to enable EOM counting

RAW

FF

04

FF

//Select CDR Register Page

RAW6400

80

//Sets EOM Power Down to 0

RAW

65

40

40

//Enables Fast EOM
RAW

67

0101

//Self-clearing bit to start EOM

RAR

67

00

01

//Wait for 0x67[0] to clear to 0

RAW

64

00

40

//Scale EOM range - Custom Scaling

RAW64

30

30

//12.5mV step plots 800mVpp sets 0x64[4:5] to 11

RAR

68/69

xx

00

//Read Reg 0x68 then 0x69 and discard contents

RAR

68/69

xx

00

//Read Reg 0x68 then 0x69 and discard contents
RAR

68

xx

FF

//Read MSBs of cell and save number of eye hits
RAR

69

xx

FF

//Read LSBs of cell and save number of eye hits
//Execute the above two commands for 4095 more times (total 4096 cells)

RAW

64

80

80

//Power down EOM