SNAU305 February   2025 LMH1229 , LMH1239

 

  1.   1
  2.   LMH1229 and LMH1239 Programming Guide
  3.   Trademarks
  4. 1Access Methods
    1. 1.1 Register Programming Through SMBus
    2. 1.2 Register Programming Through SPI
    3. 1.3 Register Pages
  5. 2Register Command Syntax
  6. 3Device Configurations
    1. 3.1  Common Device Configuration
    2. 3.2  Common Register Commands
      1. 3.2.1 Channel Control
      2. 3.2.2 LMH12x9 Resets
        1. 3.2.2.1 LMH12x9 ENABLE Pin Override
        2. 3.2.2.2 LMH12x9 Share, CDR, and EQ/Drivers Page Resets
    3. 3.3  IN_MUX_SEL Override
    4. 3.4  Signal Detect Status for SDI_IN± and SDI_IN1±
      1. 3.4.1 Force Signal Detect Power Down
    5. 3.5  Lock Data Rate Indication
    6. 3.6  CDR Loop Bandwidth Override
    7. 3.7  Selective SMPTE Data Rate Lock
      1. 3.7.1 Digital Mute Reference Threshold
      2. 3.7.2 CTLE Index Check and Manual CTLE Override
    8. 3.8  Eye Opening Monitoring Operation
      1. 3.8.1 Fast EOM
        1. 3.8.1.1 Fast EOM Operation
      2. 3.8.2 Read Horizontal and Vertical Eye Opening
    9. 3.9  SDI_OUT±, OUT0± and OUT1± Default Mode of Operation
      1. 3.9.1 SDI_OUT±, OUT0± and OUT1± Independent Control
    10. 3.10 Invert OUT0±, OUT1±, and SDI_OUT± Data Polarity
    11. 3.11 OUT0±, OUT1±, and SDI_OUT± Driver Settings
      1. 3.11.1 OUT0± and OUT1± VOD Settings
      2. 3.11.2 OUT0± and OUT1± De-Emphasis Settings
      3. 3.11.3 SDI_OUT± VOD Settings
      4. 3.11.4 SDI_OUT± Pre-Emphasis
      5. 3.11.5 Output Driver Power Down
      6. 3.11.6 Cable Fault Detection (CFD)
    12. 3.12 LOCK_N Pin Output Settings
      1. 3.12.1 Interrupt Outputs Programmed by Interrupt Registers
    13. 3.13 PRBS Generator and Checker
    14. 3.14 CDR Lock Timing Control
      1. 3.14.1 Watchdog Timer
  7. 4Register Maps
    1. 4.1 Share Registers
    2. 4.2 CDR Registers
    3. 4.3 EQ_Drivers Registers

3.11.1 OUT0± and OUT1± VOD Settings

The OUT0± and OUT1± 100Ω driver has programmable peak-to-peak settings ranging from 410mVpp to 810mVpp. In default mode, the output voltage setting is determined by the VOD_DE pin. Overriding this pin setting enables register control of the output VOD settings.

Table 3-37 OUT0± VOD Settings
COMMANDREGISTERVALUEMASK//COMMENTS
RAWFF0507//Select EQ/Drivers Register Page
RAW33

08

08

//Override VOD pin for OUT0±
RAW330007//Set output VOD to 000’b (410mVpp typical)
RAW330207//Set output VOD to 010’b (560mVpp typical)
RAW330407//Set output VOD to 100’b (635mVpp typical)
RAW330607//Set output VOD to 110’b (810mVpp typical)
Table 3-38 OUT1± VOD Settings
COMMAND REGISTER VALUE MASK //COMMENTS
RAW FF 05 07

//Select EQ/Drivers Register Page
RAW

35

08

08

 //Override VOD pin for OUT1±
RAW

35

 00

07

 //Set output VOD to 000’b (410mVpp typical)
RAW

35

 02

07

 //Set output VOD to 010’b (560mVpp typical)
RAW

35

04

07

 //Set output VOD to 100’b (635mVpp typical)

RAW

35

06

07

 //Set output VOD to 110’b (810mVpp typical)