SPRACT6A october   2020  – march 2023 TMS320F2800132 , TMS320F2800132 , TMS320F2800133 , TMS320F2800133 , TMS320F2800135 , TMS320F2800135 , TMS320F2800137 , TMS320F2800137 , TMS320F2800152-Q1 , TMS320F2800152-Q1 , TMS320F2800153-Q1 , TMS320F2800153-Q1 , TMS320F2800154-Q1 , TMS320F2800154-Q1 , TMS320F2800155 , TMS320F2800155 , TMS320F2800155-Q1 , TMS320F2800155-Q1 , TMS320F2800156-Q1 , TMS320F2800156-Q1 , TMS320F2800157 , TMS320F2800157 , TMS320F2800157-Q1 , TMS320F2800157-Q1 , TMS320F280021 , TMS320F280021 , TMS320F280021-Q1 , TMS320F280021-Q1 , TMS320F280023 , TMS320F280023 , TMS320F280023-Q1 , TMS320F280023-Q1 , TMS320F280023C , TMS320F280023C , TMS320F280025 , TMS320F280025 , TMS320F280025-Q1 , TMS320F280025-Q1 , TMS320F280025C , TMS320F280025C , TMS320F280025C-Q1 , TMS320F280025C-Q1 , TMS320F280033 , TMS320F280033 , TMS320F280034 , TMS320F280034 , TMS320F280034-Q1 , TMS320F280034-Q1 , TMS320F280036-Q1 , TMS320F280036-Q1 , TMS320F280036C-Q1 , TMS320F280036C-Q1 , TMS320F280037 , TMS320F280037 , TMS320F280037-Q1 , TMS320F280037-Q1 , TMS320F280037C , TMS320F280037C , TMS320F280037C-Q1 , TMS320F280037C-Q1 , TMS320F280038-Q1 , TMS320F280038-Q1 , TMS320F280038C-Q1 , TMS320F280038C-Q1 , TMS320F280039 , TMS320F280039 , TMS320F280039-Q1 , TMS320F280039-Q1 , TMS320F280039C , TMS320F280039C , TMS320F280039C-Q1 , TMS320F280039C-Q1 , TMS320F280040-Q1 , TMS320F280040-Q1 , TMS320F280040C-Q1 , TMS320F280040C-Q1 , TMS320F280041 , TMS320F280041 , TMS320F280041-Q1 , TMS320F280041-Q1 , TMS320F280041C , TMS320F280041C , TMS320F280041C-Q1 , TMS320F280041C-Q1 , TMS320F280045 , TMS320F280045 , TMS320F280048-Q1 , TMS320F280048-Q1 , TMS320F280048C-Q1 , TMS320F280048C-Q1 , TMS320F280049 , TMS320F280049 , TMS320F280049-Q1 , TMS320F280049-Q1 , TMS320F280049C , TMS320F280049C , TMS320F280049C-Q1 , TMS320F280049C-Q1 , TMS320F28075 , TMS320F28075 , TMS320F28075-Q1 , TMS320F28075-Q1 , TMS320F28076 , TMS320F28076 , TMS320F28374D , TMS320F28374D , TMS320F28374S , TMS320F28374S , TMS320F28375D , TMS320F28375D , TMS320F28375S , TMS320F28375S , TMS320F28375S-Q1 , TMS320F28375S-Q1 , TMS320F28376D , TMS320F28376D , TMS320F28376S , TMS320F28376S , TMS320F28377D , TMS320F28377D , TMS320F28377D-EP , TMS320F28377D-EP , TMS320F28377D-Q1 , TMS320F28377D-Q1 , TMS320F28377S , TMS320F28377S , TMS320F28377S-Q1 , TMS320F28377S-Q1 , TMS320F28378D , TMS320F28378D , TMS320F28378S , TMS320F28378S , TMS320F28379D , TMS320F28379D , TMS320F28379D-Q1 , TMS320F28379D-Q1 , TMS320F28379S , TMS320F28379S , TMS320F28384D , TMS320F28384D , TMS320F28384D-Q1 , TMS320F28384D-Q1 , TMS320F28384S , TMS320F28384S , TMS320F28384S-Q1 , TMS320F28384S-Q1 , TMS320F28386D , TMS320F28386D , TMS320F28386D-Q1 , TMS320F28386D-Q1 , TMS320F28386S , TMS320F28386S , TMS320F28386S-Q1 , TMS320F28386S-Q1 , TMS320F28388D , TMS320F28388D , TMS320F28388S , TMS320F28388S , TMS320F28P650DH , TMS320F28P650DH , TMS320F28P650DK , TMS320F28P650DK , TMS320F28P650SH , TMS320F28P650SH , TMS320F28P650SK , TMS320F28P650SK , TMS320F28P659DK-Q1 , TMS320F28P659DK-Q1

 

  1.   Abstract
  2.   Trademarks
  3. 1Introduction
    1. 1.1 Mechanism of ADC Input Settling
    2. 1.2 Symptoms of Inadequate Settling
    3. 1.3 Resources
      1. 1.3.1 TINA-TI SPICE-Based Analog Simulation Program
      2. 1.3.2 PSPICE for TI Design and Simulation Tool
      3. 1.3.3 TI Precision Labs - SAR ADC Input Driver Design Series
      4. 1.3.4 Analog Engineer's Calculator
      5. 1.3.5 Related Application Reports
      6. 1.3.6 TINA-TI ADC Input Models
  4. 2Input Settling Design Steps
    1. 2.1 Select the ADC
    2. 2.2 Find the Minimum Op-Amp Bandwidth and RC Filter Ranges
      1. 2.2.1 Select Type
      2. 2.2.2 Resolution
      3. 2.2.3 Csh
      4. 2.2.4 Full-Scale Range
      5. 2.2.5 Acquisition Time
      6. 2.2.6 Outputs
      7. 2.2.7 Math Behind the Calculator
    3. 2.3 Select an Op-Amp
    4. 2.4 Verify the Op-Amp Model
    5. 2.5 Build the ADC Input Model
      1. 2.5.1 Vin
      2. 2.5.2 Voa , Voa_SS, and Verror
      3. 2.5.3 Rs, Cs, and Vcont
      4. 2.5.4 Ch, Ron, and Cp
      5. 2.5.5 S+H Switch, Discharge Switch, tacq, and tdis
    6. 2.6 Refine RC Filter Values Via Simulation
    7. 2.7 Perform Final Simulations
    8. 2.8 Input Design Worksheet
  5. 3Example Circuit Design
    1. 3.1  Select the ADC
    2. 3.2  Find the Minimum Op-Amp Bandwidth and RC Filter Ranges
    3. 3.3  Verify the Op-amp Model
    4. 3.4  Build the ADC Input Model
    5. 3.5  DC Node Analysis
    6. 3.6  Refine RC Filter Values Via Simulation (Part 1)
    7. 3.7  Refine RC Filter Values Via Simulation (Part 2)
    8. 3.8  Refine RC Filter Values Via Simulation (Part 3)
    9. 3.9  Further Refinement
    10. 3.10 Further Simulations
    11. 3.11 Completed Worksheet
  6. 4Working With Existing Circuits or Additional Constraints
    1. 4.1 Existing Circuits
      1. 4.1.1 Brief Overview of Charge Sharing
      2. 4.1.2 Charge Sharing Example
    2. 4.2 Pre-Selected Op-Amp
      1. 4.2.1 Pre-Selected Op-Amp Example
    3. 4.3 Pre-Selected Rs and Cs Values
      1. 4.3.1 Analytical Solution for ADC Acquisition Time
      2. 4.3.2 Example Analytical Solution for ADC Acquisition Time
  7. 5Summary
  8. 6References
  9. 7Revision History

Related Application Reports

TI provides several application reports that pertain to the design and evaluation of ADC input circuits on C2000 real-time MCU devices. These application reports are listed along with brief descriptions.

Application Report Title Schematic Capture and Simulation Tool Purpose
ADC Input Circuit Evaluation for C2000 MCUs (TINA-TI) TINA-TI Describes how to design and evaluate a traditional high-speed ADC driving circuit. Input circuit includes an op-amp. Appropriate when sampling a high bandwidth signal near the maximum sample rate of the ADC.
ADC Input Circuit Evaluation for C2000 MCUs (PSpice for TI) PSpice for TI
Charge-Sharing Driving Circuits for C2000 ADCs (TINA-TI) TINA-TI Describes how to design and evaluate a charge-sharing ADC driving circuit. Input circuit may or may not include an op-amp. Appropriate when sampling a signal with a sufficiently low bandwidth and sample rate.
Charge-Sharing Driving Circuits for C2000 ADCs (PSpice for TI) PSpice for TI
Methods for Mitigating ADC Memory Cross-Talk

TINA-TI

Describes strategies to mitigate memory cross-talk error when the input circuit design does not achieve adequate settling. Applicable under special circumstances.