SWCU194 March 2023 CC1314R10 , CC1354P10 , CC1354R10 , CC2674P10 , CC2674R10
Table 26-188 lists the memory-mapped registers for the RFC_RAT registers. All register offset addresses not listed in Table 26-188 should be considered as reserved locations and the register contents should not be modified.
Offset | Acronym | Register Name | Section |
---|---|---|---|
4h | RATCNT | Radio Timer Counter Value | Section 26.11.1.1 |
80h | RATCH0VAL | Timer Channel 0 Capture/Compare Register | Section 26.11.1.2 |
84h | RATCH1VAL | Timer Channel 1 Capture/Compare Register | Section 26.11.1.3 |
88h | RATCH2VAL | Timer Channel 2 Capture/Compare Register | Section 26.11.1.4 |
8Ch | RATCH3VAL | Timer Channel 3 Capture/Compare Register | Section 26.11.1.5 |
90h | RATCH4VAL | Timer Channel 4 Capture/Compare Register | Section 26.11.1.6 |
94h | RATCH5VAL | Timer Channel 5 Capture/Compare Register | Section 26.11.1.7 |
98h | RATCH6VAL | Timer Channel 6 Capture/Compare Register | Section 26.11.1.8 |
9Ch | RATCH7VAL | Timer Channel 7 Capture/Compare Register | Section 26.11.1.9 |
Complex bit access types are encoded to fit into small table cells. Table 26-189 shows the codes that are used for access types in this section.
Access Type | Code | Description |
---|---|---|
Read Type | ||
R | R | Read |
Write Type | ||
W | W | Write |
Reset or Default Value | ||
-n | Value after reset or the default value |
RATCNT is shown in Table 26-190.
Return to the Summary Table.
Radio Timer Counter Value
Bit | Field | Type | Reset | Description |
---|---|---|---|---|
31-0 | CNT | R/W | 0h | Counter value. This is not writable while radio timer counter is enabled. |
RATCH0VAL is shown in Table 26-191.
Return to the Summary Table.
Timer Channel 0 Capture/Compare Register
Bit | Field | Type | Reset | Description |
---|---|---|---|---|
31-0 | VAL | R/W | 0h | Capture/compare value. Only writable when the channel is configured for compare mode. In compare mode, a write to this register will auto-arm the channel. |
RATCH1VAL is shown in Table 26-192.
Return to the Summary Table.
Timer Channel 1 Capture/Compare Register
Bit | Field | Type | Reset | Description |
---|---|---|---|---|
31-0 | VAL | R/W | 0h | Capture/compare value. Only writable when the channel is configured for compare mode. In compare mode, a write to this register will auto-arm the channel. |
RATCH2VAL is shown in Table 26-193.
Return to the Summary Table.
Timer Channel 2 Capture/Compare Register
Bit | Field | Type | Reset | Description |
---|---|---|---|---|
31-0 | VAL | R/W | 0h | Capture/compare value. Only writable when the channel is configured for compare mode. In compare mode, a write to this register will auto-arm the channel. |
RATCH3VAL is shown in Table 26-194.
Return to the Summary Table.
Timer Channel 3 Capture/Compare Register
Bit | Field | Type | Reset | Description |
---|---|---|---|---|
31-0 | VAL | R/W | 0h | Capture/compare value. Only writable when the channel is configured for compare mode. In compare mode, a write to this register will auto-arm the channel. |
RATCH4VAL is shown in Table 26-195.
Return to the Summary Table.
Timer Channel 4 Capture/Compare Register
Bit | Field | Type | Reset | Description |
---|---|---|---|---|
31-0 | VAL | R/W | 0h | Capture/compare value. Only writable when the channel is configured for compare mode. In compare mode, a write to this register will auto-arm the channel. |
RATCH5VAL is shown in Table 26-196.
Return to the Summary Table.
Timer Channel 5 Capture/Compare Register
Bit | Field | Type | Reset | Description |
---|---|---|---|---|
31-0 | VAL | R/W | 0h | Capture/compare value. Only writable when the channel is configured for compare mode. In compare mode, a write to this register will auto-arm the channel. |
RATCH6VAL is shown in Table 26-197.
Return to the Summary Table.
Timer Channel 6 Capture/Compare Register
Bit | Field | Type | Reset | Description |
---|---|---|---|---|
31-0 | VAL | R/W | 0h | Capture/compare value. Only writable when the channel is configured for compare mode. In compare mode, a write to this register will auto-arm the channel. |
RATCH7VAL is shown in Table 26-198.
Return to the Summary Table.
Timer Channel 7 Capture/Compare Register
Bit | Field | Type | Reset | Description |
---|---|---|---|---|
31-0 | VAL | R/W | 0h | Capture/compare value. Only writable when the channel is configured for compare mode. In compare mode, a write to this register will auto-arm the channel. |