SWCU194 March 2023 CC1314R10 , CC1354P10 , CC1354R10 , CC2674P10 , CC2674R10
Table 9-8 lists the memory-mapped registers for the SRAM registers. All register offset addresses not listed in Table 9-8 should be considered as reserved locations and the register contents should not be modified.
Offset | Acronym | Register Name | Section |
---|---|---|---|
0h + formula | BANK0_y | 32k SRAM | Section 9.7.2.1 |
8000h + formula | BANK1_y | 32k SRAM | Section 9.7.2.2 |
00010000h + formula | BANK2_y | 32k SRAM | Section 9.7.2.3 |
00018000h + formula | BANK3_y | 32k SRAM | Section 9.7.2.4 |
00020000h + formula | BANK4_y | 32k SRAM | Section 9.7.2.5 |
00028000h + formula | BANK5_y | 32k SRAM | Section 9.7.2.6 |
00030000h + formula | BANK6_y | 32k SRAM | Section 9.7.2.7 |
00038000h + formula | BANK7_y | 32k SRAM | Section 9.7.2.8 |
Complex bit access types are encoded to fit into small table cells. Table 9-9 shows the codes that are used for access types in this section.
Access Type | Code | Description |
---|---|---|
Read Type | ||
R | R | Read |
Write Type | ||
W | W | Write |
Reset or Default Value | ||
-n | Value after reset or the default value | |
Register Array Variables | ||
i,j,k,l,m,n | When these variables are used in a register name, an offset, or an address, they refer to the value of a register array where the register is part of a group of repeating registers. The register groups form a hierarchical structure and the array is represented with a formula. | |
y | When this variable is used in a register name, an offset, or an address it refers to the value of a register array. |
BANK0_y is shown in Table 9-10.
Return to the Summary Table.
32k SRAM
Offset = 0h + (y * 4h); where y = 0h to 1FFFh
Bit | Field | Type | Reset | Description |
---|---|---|---|---|
31-0 | DATA | R/W | X | SRAM data |
BANK1_y is shown in Table 9-11.
Return to the Summary Table.
32k SRAM
Offset = 8000h + (y * 4h); where y = 0h to 1FFFh
Bit | Field | Type | Reset | Description |
---|---|---|---|---|
31-0 | DATA | R/W | X | SRAM data |
BANK2_y is shown in Table 9-12.
Return to the Summary Table.
32k SRAM
Offset = 00010000h + (y * 4h); where y = 0h to 1FFFh
Bit | Field | Type | Reset | Description |
---|---|---|---|---|
31-0 | DATA | R/W | X | SRAM data |
BANK3_y is shown in Table 9-13.
Return to the Summary Table.
32k SRAM
Offset = 00018000h + (y * 4h); where y = 0h to 1FFFh
Bit | Field | Type | Reset | Description |
---|---|---|---|---|
31-0 | DATA | R/W | X | SRAM data |
BANK4_y is shown in Table 9-14.
Return to the Summary Table.
32k SRAM
Offset = 00020000h + (y * 4h); where y = 0h to 1FFFh
Bit | Field | Type | Reset | Description |
---|---|---|---|---|
31-0 | DATA | R/W | X | SRAM data |
BANK5_y is shown in Table 9-15.
Return to the Summary Table.
32k SRAM
Offset = 00028000h + (y * 4h); where y = 0h to 1FFFh
Bit | Field | Type | Reset | Description |
---|---|---|---|---|
31-0 | DATA | R/W | X | SRAM data |
BANK6_y is shown in Table 9-16.
Return to the Summary Table.
32k SRAM
Offset = 00030000h + (y * 4h); where y = 0h to 1FFFh
Bit | Field | Type | Reset | Description |
---|---|---|---|---|
31-0 | DATA | R/W | X | SRAM data |
BANK7_y is shown in Table 9-17.
Return to the Summary Table.
32k SRAM
Offset = 00038000h + (y * 4h); where y = 0h to 1FFFh
Bit | Field | Type | Reset | Description |
---|---|---|---|---|
31-0 | DATA | R/W | X | SRAM data |