TIDUF75 April   2025

 

  1.   1
  2.   Description
  3.   Resources
  4.   Features
  5.   Applications
  6.   6
  7. 1System Description
    1. 1.1 Key System Specifications
  8. 2System Overview
    1. 2.1 System Block Diagram
    2. 2.2 Design Considerations
      1. 2.2.1  Determining the Number of eFuse Devices to use in Parallel
      2. 2.2.2  Setting up the Primary and Secondary Devices in a Parallel Configuration
      3. 2.2.3  Selecting the CDVDT Capacitor to Control the Output Slew Rate and Start-Up Time
      4. 2.2.4  Selecting the RIREF Resistor to set the Reference Voltage for Overcurrent Protection and Active Current Sharing
      5. 2.2.5  Selecting the RIMON Resistor to set the Overcurrent (Circuit Breaker) and Fast-Trip Thresholds During Steady-State
      6. 2.2.6  Selecting the RILIM Resistor to set the Current Limit and Fast-Trip Thresholds During Start-Up and the Active Sharing Threshold During Steady-State
      7. 2.2.7  Selecting the CITIMER Capacitor to Set the Overcurrent Blanking Timer
      8. 2.2.8  Selecting the Resistors to set the Under-voltage Lockout Threshold
      9. 2.2.9  Selecting the R-C Filter Between VIN and VDD
      10. 2.2.10 Selecting the Pullup Resistors and Power Supplies for SWEN, PG, FLT, and CMPOUT Pins
      11. 2.2.11 TVS Diode Selection at Input and Schottky Diode Selection at Output
      12. 2.2.12 Selecting CIN and COUT
    3. 2.3 Highlighted Products
      1. 2.3.1 TPS25985
      2. 2.3.2 LM94022 and LM94022-Q1
      3. 2.3.3 INA241x
      4. 2.3.4 TLV760
      5. 2.3.5 SN74LVC1G123
      6. 2.3.6 UCC27511A
      7. 2.3.7 CSD18510Q5B
  9. 3Hardware, Software, Testing Requirements, and Test Results
    1. 3.1 Hardware Requirements
    2. 3.2 Test Setup
    3. 3.3 Test Results
      1.      36
  10. 4Design and Documentation Support
    1. 4.1 Design Files
      1. 4.1.1 Schematics
      2. 4.1.2 Bill of Materials
      3. 4.1.3 Altium Project
      4. 4.1.4 Gerber Files
    2. 4.2 Tools
    3. 4.3 Documentation Support
    4. 4.4 Support Resources
    5. 4.5 Trademarks
  11. 5About the Author

2.2.8 Selecting the Resistors to set the Under-voltage Lockout Threshold

The under-voltage lockout (UVLO) threshold is adjusted by employing the external voltage divider network of R1 and R2 connected between IN, EN/UVLO, and GND pins of the device as described in the under-voltage protection section of the TPS25985x data sheet. The resistor values required for setting up the UVLO threshold are calculated using Equation 18.

Equation 18. VINUV=VUVLORR1+R2R2

To minimize the input current drawn from the power supply, TI recommends using higher resistance values for R1 and R2. The current drawn by R1 and R2 from the power supply is IR12 = VIN / (R1 + R2). However, the leakage currents due to external active components connected to the resistor string can add errors to these calculations. So, the resistor string current, IR12 must be 20 times greater than the leakage current at the EN/UVLO pin (IENLKG). From the device electrical specifications, IENLKG is 0.1µA (maximum) and UVLO rising threshold VUVLO(R) = 1.2V. From the design requirements, VINUVLO = 10.8V. First choose the value of R1 = 1MΩ and use Equation 18 to calculate R2 = 125kΩ. Use the closest standard 1% resistor values: R1 = 1MΩ and R2 = 124kΩ. For noise reduction, place a 1nF ceramic capacitor across the EN/UVLO pin and GND.