TIDUF85A August   2024  – December 2024

 

  1.   1
  2.   Description
  3.   Resources
  4.   Features
  5.   Applications
  6.   6
  7. 1System Description
    1. 1.1 Key System Specifications
  8. 2System Overview
    1. 2.1 Block Diagram
      1. 2.1.1 Subsystems
        1. 2.1.1.1 Arc Detection Channels
          1. 2.1.1.1.1 Isolated Current Measurement
          2. 2.1.1.1.2 Band-Pass Filter
          3. 2.1.1.1.3 Analog-to-Digital Conversion
          4. 2.1.1.1.4 Arc Detection Using Embedded AI Models
        2. 2.1.1.2 Arc Labeling Circuit
          1. 2.1.1.2.1 Isolated String Voltage Measurement
          2. 2.1.1.2.2 Isolated Arc Voltage Measurement With Isolated Comparator
          3. 2.1.1.2.3 Window Comparator for Advanced Labeling
    2. 2.2 Design Considerations
      1. 2.2.1 Current Sensor and Input Stage
      2. 2.2.2 Analog Band-Pass Filter
      3. 2.2.3 Arc-Labeling Circuit
        1. 2.2.3.1 String Voltage Sensing
        2. 2.2.3.2 Arc Gap Voltage Sensing
        3. 2.2.3.3 Differential to Single-Ended Conversion
        4. 2.2.3.4 Window Comparator for Arc Labeling
      4. 2.2.4 Auxiliary Power Supply
      5. 2.2.5 controlCard and Debug Interface
    3. 2.3 Highlighted Products
      1. 2.3.1 TIEVM-ARC-AFE
      2. 2.3.2 TMDSCNCD28P55X – TMDSCNCD28P55X controlCARD Evaluation Module
        1. 2.3.2.1 Hardware Features
      3. 2.3.3 OPA4323 – Quad, 5.5V, 20MHz, Zero-Cross Low-Noise (6nV/√Hz) RRIO Operational Amplifier
      4. 2.3.4 OPA323 – Single, 5.5V, 20MHz, Zero-Cross Low-Noise (6nV/√Hz) RRIO Operational Amplifier
      5. 2.3.5 AMC3330 – ±1V Input, Precision Voltage Sensing Reinforced Isolated Amplifier With Integrated DC/DC
      6. 2.3.6 AMC23C11 – Fast-Response, Reinforced, Isolated Comparator With Adjustable Threshold and Latch Function
  9. 3Hardware, Testing Requirements, and Test Results
    1. 3.1 Signal Chain Verification
      1. 3.1.1 Hardware Requirements
      2. 3.1.2 Test Setup
      3. 3.1.3 Test Results
    2. 3.2 Arc Testing
  10. 4Design and Documentation Support
    1. 4.1 Design Files
      1. 4.1.1 Schematics
      2. 4.1.2 BOM
    2. 4.2 Tools and Software
    3. 4.3 Documentation Support
    4. 4.4 Support Resources
    5. 4.5 Trademarks
  11. 5About the Author
  12. 6Revision History

2.2.5 controlCard and Debug Interface

Figure 2-10 shows the controlCard and debug interfaces of this reference design. The controlCard is connected to connector J5. The controlCARD provides connection to the ADCs of the MCU for the analog signals as well as several GPIO connections for the comparator outputs. Additionally four LEDs can be controlled by the MCU. This can be used for status indication or debug purposes.

J6 is an additional debug header. This header provides an serial-peripheral interface (SPI) to the controlCard, three additional GPIOs and supply rails.

TIDA-010955 Schematics Off-Board Connectors Figure 2-11 Schematics Off-Board Connectors