TIDUF85A August   2024  – December 2024

 

  1.   1
  2.   Description
  3.   Resources
  4.   Features
  5.   Applications
  6.   6
  7. 1System Description
    1. 1.1 Key System Specifications
  8. 2System Overview
    1. 2.1 Block Diagram
      1. 2.1.1 Subsystems
        1. 2.1.1.1 Arc Detection Channels
          1. 2.1.1.1.1 Isolated Current Measurement
          2. 2.1.1.1.2 Band-Pass Filter
          3. 2.1.1.1.3 Analog-to-Digital Conversion
          4. 2.1.1.1.4 Arc Detection Using Embedded AI Models
        2. 2.1.1.2 Arc Labeling Circuit
          1. 2.1.1.2.1 Isolated String Voltage Measurement
          2. 2.1.1.2.2 Isolated Arc Voltage Measurement With Isolated Comparator
          3. 2.1.1.2.3 Window Comparator for Advanced Labeling
    2. 2.2 Design Considerations
      1. 2.2.1 Current Sensor and Input Stage
      2. 2.2.2 Analog Band-Pass Filter
      3. 2.2.3 Arc-Labeling Circuit
        1. 2.2.3.1 String Voltage Sensing
        2. 2.2.3.2 Arc Gap Voltage Sensing
        3. 2.2.3.3 Differential to Single-Ended Conversion
        4. 2.2.3.4 Window Comparator for Arc Labeling
      4. 2.2.4 Auxiliary Power Supply
      5. 2.2.5 controlCard and Debug Interface
    3. 2.3 Highlighted Products
      1. 2.3.1 TIEVM-ARC-AFE
      2. 2.3.2 TMDSCNCD28P55X – TMDSCNCD28P55X controlCARD Evaluation Module
        1. 2.3.2.1 Hardware Features
      3. 2.3.3 OPA4323 – Quad, 5.5V, 20MHz, Zero-Cross Low-Noise (6nV/√Hz) RRIO Operational Amplifier
      4. 2.3.4 OPA323 – Single, 5.5V, 20MHz, Zero-Cross Low-Noise (6nV/√Hz) RRIO Operational Amplifier
      5. 2.3.5 AMC3330 – ±1V Input, Precision Voltage Sensing Reinforced Isolated Amplifier With Integrated DC/DC
      6. 2.3.6 AMC23C11 – Fast-Response, Reinforced, Isolated Comparator With Adjustable Threshold and Latch Function
  9. 3Hardware, Testing Requirements, and Test Results
    1. 3.1 Signal Chain Verification
      1. 3.1.1 Hardware Requirements
      2. 3.1.2 Test Setup
      3. 3.1.3 Test Results
    2. 3.2 Arc Testing
  10. 4Design and Documentation Support
    1. 4.1 Design Files
      1. 4.1.1 Schematics
      2. 4.1.2 BOM
    2. 4.2 Tools and Software
    3. 4.3 Documentation Support
    4. 4.4 Support Resources
    5. 4.5 Trademarks
  11. 5About the Author
  12. 6Revision History

Test Setup

Before setting up the test board, complete a visual inspection, to make sure the board is in a good condition.

TIDA-010955 Test Setup Figure 3-1 Test Setup

Use the following setup for the low-voltage signal chain verification:

  1. Connect an auxiliary power supply to J7. The auxiliary supply accepts voltages between 8V and 16V and requires a nominal current below 200mA. An eFuse is implemented to limit the current to a maximum of 600mA.
  2. Check that LED D11 and LED D12 for 5V and 3.3V light up.
  3. Short circuit the output of the signal generator and feed the cable through one of the current transformers. Select a sinusoidal output. For a 50Ω output and a voltage of 15V this results in 0.3A of current.
  4. To verify the saturation behavior of the current transformer, a second cable carrying a DC current can be fed through the current transformer.
  5. The debug connection to the PC is not necessary to verify that the analog part of the signal chain is working correctly.
  6. Make sure a jumper is placed between pin 1 and pin 2 of J8, J9, J11, and J12 if the onboard CT is used, or between pin 2 and 3 if a external sensor is used.

Now the following test points can be used to observe the signal through the signal chain (example for CH1, see Table 3-1 for test point designators of other channels):

  • TP9 (CT1+): Positive output of the current transformer
  • TP2 (CH1 Filt In: Signal at the output of the gain stage and input of the band-pass filter
  • TP35: Signals after low-pass section of the band-pass filter
  • TP1(CH1 Filt Out): Signal at the output of the band-pass filter and input of the ADC