TIDUF85A August   2024  – December 2024

 

  1.   1
  2.   Description
  3.   Resources
  4.   Features
  5.   Applications
  6.   6
  7. 1System Description
    1. 1.1 Key System Specifications
  8. 2System Overview
    1. 2.1 Block Diagram
      1. 2.1.1 Subsystems
        1. 2.1.1.1 Arc Detection Channels
          1. 2.1.1.1.1 Isolated Current Measurement
          2. 2.1.1.1.2 Band-Pass Filter
          3. 2.1.1.1.3 Analog-to-Digital Conversion
          4. 2.1.1.1.4 Arc Detection Using Embedded AI Models
        2. 2.1.1.2 Arc Labeling Circuit
          1. 2.1.1.2.1 Isolated String Voltage Measurement
          2. 2.1.1.2.2 Isolated Arc Voltage Measurement With Isolated Comparator
          3. 2.1.1.2.3 Window Comparator for Advanced Labeling
    2. 2.2 Design Considerations
      1. 2.2.1 Current Sensor and Input Stage
      2. 2.2.2 Analog Band-Pass Filter
      3. 2.2.3 Arc-Labeling Circuit
        1. 2.2.3.1 String Voltage Sensing
        2. 2.2.3.2 Arc Gap Voltage Sensing
        3. 2.2.3.3 Differential to Single-Ended Conversion
        4. 2.2.3.4 Window Comparator for Arc Labeling
      4. 2.2.4 Auxiliary Power Supply
      5. 2.2.5 controlCard and Debug Interface
    3. 2.3 Highlighted Products
      1. 2.3.1 TIEVM-ARC-AFE
      2. 2.3.2 TMDSCNCD28P55X – TMDSCNCD28P55X controlCARD Evaluation Module
        1. 2.3.2.1 Hardware Features
      3. 2.3.3 OPA4323 – Quad, 5.5V, 20MHz, Zero-Cross Low-Noise (6nV/√Hz) RRIO Operational Amplifier
      4. 2.3.4 OPA323 – Single, 5.5V, 20MHz, Zero-Cross Low-Noise (6nV/√Hz) RRIO Operational Amplifier
      5. 2.3.5 AMC3330 – ±1V Input, Precision Voltage Sensing Reinforced Isolated Amplifier With Integrated DC/DC
      6. 2.3.6 AMC23C11 – Fast-Response, Reinforced, Isolated Comparator With Adjustable Threshold and Latch Function
  9. 3Hardware, Testing Requirements, and Test Results
    1. 3.1 Signal Chain Verification
      1. 3.1.1 Hardware Requirements
      2. 3.1.2 Test Setup
      3. 3.1.3 Test Results
    2. 3.2 Arc Testing
  10. 4Design and Documentation Support
    1. 4.1 Design Files
      1. 4.1.1 Schematics
      2. 4.1.2 BOM
    2. 4.2 Tools and Software
    3. 4.3 Documentation Support
    4. 4.4 Support Resources
    5. 4.5 Trademarks
  11. 5About the Author
  12. 6Revision History

1 System Description

With the increasing amount of solar installations, safety concerns become ever more important. Arcing on high-voltage lines must be detected and the solar string must be de-energized to prevent hazards like electrical shock or fire. Therefore, standards like UL 1699B demand arc-fault protection circuits for all solar systems with rated voltages below 1500V. This reference design is intended to show an implementation for an analog front end for such arc detection purposes. The design does not fulfill the UL 1699B standard by itself.

DC arcing causes an AC noise current in the cabling of a PV string, which is present in a wide spectrum up to several MHz. The challenge for DC arc detection in solar is to detect this increase in noise within the PV cables in a reliable way, while not causing false alarms and shutdowns. To achieve this capability, a low-noise, high-performance, analog front end is required, since the injected AC noise of an arc can be in the range of a few mA sitting on top of the DC string current which is in the range of 20A in residential applications and even higher for commercial solar applications. Additionally, there a several other sources of noise within a solar system which cannot be falsely interpreted as an arc. Examples for these other noise sources are the switching frequency of the inverter or power line communication on the PV cabling. Traditionally, algorithms were used to identify arcing signatures in the measured current. To achieve a reliable arc detection, these algorithms often need to be fine-tuned to each system, since the arcing signatures are highly system-dependent.

A recent approach is to use embedded Artificial Intelligence (AI) models to identify arcs. If trained correctly, this AI-based approach can achieve better accuracy and is more robust against false alarms.

To train these AI models, training data must be acquired. For this purpose this reference design has an arc-labeling circuit implemented. The design uses the fact that there is a measurable voltage drop across the arc, to label the current data as an arc or as a normal operating condition. This can be done, since in a laboratory environment this arc voltage is accessible.