TIDUF85A August   2024  – December 2024

 

  1.   1
  2.   Description
  3.   Resources
  4.   Features
  5.   Applications
  6.   6
  7. 1System Description
    1. 1.1 Key System Specifications
  8. 2System Overview
    1. 2.1 Block Diagram
      1. 2.1.1 Subsystems
        1. 2.1.1.1 Arc Detection Channels
          1. 2.1.1.1.1 Isolated Current Measurement
          2. 2.1.1.1.2 Band-Pass Filter
          3. 2.1.1.1.3 Analog-to-Digital Conversion
          4. 2.1.1.1.4 Arc Detection Using Embedded AI Models
        2. 2.1.1.2 Arc Labeling Circuit
          1. 2.1.1.2.1 Isolated String Voltage Measurement
          2. 2.1.1.2.2 Isolated Arc Voltage Measurement With Isolated Comparator
          3. 2.1.1.2.3 Window Comparator for Advanced Labeling
    2. 2.2 Design Considerations
      1. 2.2.1 Current Sensor and Input Stage
      2. 2.2.2 Analog Band-Pass Filter
      3. 2.2.3 Arc-Labeling Circuit
        1. 2.2.3.1 String Voltage Sensing
        2. 2.2.3.2 Arc Gap Voltage Sensing
        3. 2.2.3.3 Differential to Single-Ended Conversion
        4. 2.2.3.4 Window Comparator for Arc Labeling
      4. 2.2.4 Auxiliary Power Supply
      5. 2.2.5 controlCard and Debug Interface
    3. 2.3 Highlighted Products
      1. 2.3.1 TIEVM-ARC-AFE
      2. 2.3.2 TMDSCNCD28P55X – TMDSCNCD28P55X controlCARD Evaluation Module
        1. 2.3.2.1 Hardware Features
      3. 2.3.3 OPA4323 – Quad, 5.5V, 20MHz, Zero-Cross Low-Noise (6nV/√Hz) RRIO Operational Amplifier
      4. 2.3.4 OPA323 – Single, 5.5V, 20MHz, Zero-Cross Low-Noise (6nV/√Hz) RRIO Operational Amplifier
      5. 2.3.5 AMC3330 – ±1V Input, Precision Voltage Sensing Reinforced Isolated Amplifier With Integrated DC/DC
      6. 2.3.6 AMC23C11 – Fast-Response, Reinforced, Isolated Comparator With Adjustable Threshold and Latch Function
  9. 3Hardware, Testing Requirements, and Test Results
    1. 3.1 Signal Chain Verification
      1. 3.1.1 Hardware Requirements
      2. 3.1.2 Test Setup
      3. 3.1.3 Test Results
    2. 3.2 Arc Testing
  10. 4Design and Documentation Support
    1. 4.1 Design Files
      1. 4.1.1 Schematics
      2. 4.1.2 BOM
    2. 4.2 Tools and Software
    3. 4.3 Documentation Support
    4. 4.4 Support Resources
    5. 4.5 Trademarks
  11. 5About the Author
  12. 6Revision History

2.3.2.1 Hardware Features

  • Isolated onboard XDS110 USB-to-JTAG debug probe enables real-time in-system programming and debugging
  • Standard 180-pin controlCARD high-speed edge card (HSEC) interface
  • Analog I/O, digital I/O, and JTAG signals at card interface
  • Hardware Files are in C2000Ware at boards\controlCARDs\TMDSCNCD28P55X

The TMS320F28P55x (F28P55x) is a member of the C2000™ real-time microcontroller family of scalable, ultra-low latency devices designed for efficiency in power electronics, including but not limited to: high power density, high switching frequencies, and supporting the use of GaN and SiC technologies. The device features a C28x 32-bit DSP CPU and a programmable Control Law Accelerator (CLA), which operate at 150MHz for floating- or fixed-point code running from either on-chip flash or SRAM. The C28x CPU is further boosted by the Floating-Point Unit (FPU), Trigonometric Math Unit (TMU), and VCRC (Cyclical Redundancy Check) extended instruction sets, speeding up common algorithms key to real-time control systems. The device also features a Neural-Network Processing Unit (NPU) that is highly optimized for Deep Convolutional Neural Networks (CNN) and delivers up to 10 × NN inferring performance improvement versus software implementation.