TIDUFF8 September 2025
The nominal input supply voltage is 24V with a maximum input voltage range of 60V. The TPSM365R3 DCDC buck module accepts up to 65V input and generates a 5.5V intermediate power rail. C1, C2, and C3 are decoupling capacitors and are placed close to VIN and the GND PIN. R5 configures the switching frequency of this converter, the 10kΩ resistor is set to 1500kHz. R3 and R4 set the output voltage to 5.5V. Equation 2 shows that the output voltage can be calculated with VFB = 1V.
The LDO TPS70950 generates 5V from the intermediate 5.5V input for LDC5072. The LDO TPS70933 generates a 3.3V rail for LDC5072, TLV9062, and MSPM0G3507. The J1 jumper selects the LDC5072 supply voltage, ether 3.3V or 5V. The 1μF capacitors C14 and C23 are added for noise decoupling and 10μF output capacitors C13 and C21 are added for stable operation.
The voltage reference REF3533 is powered by the 5V supply and generates precise 3.3V output as the reference of the MSPM0 ADC. Similarly, with the TPS7A0533, C8 (100nF) is needed for decoupling and C9 (1μF) are used for stable operation.