The LMC662 CMOS Dual operational amplifier is ideal for operation from a single supply. It operates from +5V to +15V and features rail-to-rail output swing in addition to an input common-mode range that includes ground. Performance limitations that have plagued CMOS amplifiers in the past are not a problem with this design. Input VOS, drift, and broadband noise as well as voltage gain into realistic loads (2 kΩ and 600Ω) are all equal to or better than widely accepted bipolar equivalents.
This chip is built with TI's advanced Double-Poly Silicon-Gate CMOS process.
See the LMC660 datasheet for a Quad CMOS operational amplifier with these same features.
All trademarks are the property of their respective owners.
| Number of channels (#) |
| Total Supply Voltage (Min) (+5V=5, +/-5V=10) |
| Total Supply Voltage (Max) (+5V=5, +/-5V=10) |
| GBW (Typ) (MHz) |
| Slew Rate (Typ) (V/us) |
| Rail-to-rail |
| Vos (offset voltage @ 25 C) (Max) (mV) |
| Iq per channel (Typ) (mA) |
| Vn at 1 kHz (Typ) (nV/rtHz) |
| Rating |
| Operating temperature range (C) |
| Package Group |
| Package size: mm2:W x L (PKG) |
| Offset drift (Typ) (uV/C) |
| Features |
| Input bias current (Max) (pA) |
| CMRR (Typ) (dB) |
| Output current (Typ) (mA) |
| Architecture |
| LMC662 |
|---|
| 2 |
| 4.75 |
| 15.5 |
| 1.4 |
| 1.1 |
|
In to V- Out |
| 3 |
| 0.38 |
| 22 |
| Catalog |
|
-40 to 85 0 to 70 |
|
PDIP | 8
SOIC | 8 |
|
See datasheet (PDIP) 8SOIC: 29 mm2: 6 x 4.9 (SOIC | 8) |
| 1.3 |
|
|
| 20 |
| 83 |
| 21 |
| CMOS |
| Order now |
