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LMH6401

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4.5 GHz ultra wideband digital variable gain amplifier

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4.5 GHz ultra wideband digital variable gain amplifier

LMH6401

ACTIVE
Data sheet Order now

Product details

Parameters

2nd harmonic (dBc) -73 3rd harmonic (dBc) -80 @ MHz 200 Acl, min spec gain (V/V) 0.5 Approx. price (US$) 8.76 | 1ku Architecture VGA, Fully Differential ADC Driver BW @ Acl (MHz) 4500 Gain (Max) (dB) 26 Gain (Min) (dB) -6 Step size (dB) 1 Iq per channel (Typ) (mA) 69 Number of channels (#) 1 Operating temperature range (C) -40 to 85 Slew rate (Typ) (V/us) 18200 Total supply voltage (Max) (+5V=5, +/-5V=10) 5.25 Total supply voltage (Min) (+5V=5, +/-5V=10) 4 Vs (Max) (V) 5 open-in-new Find other RF VGAs

Package | Pins | Size

UQFN-HR (RMZ) 16 9 mm² 3 x 3 open-in-new Find other RF VGAs

Features

  • 3-dB Bandwidth: 4.5 GHz at 26-dB Gain
  • Gain Range: –6 dB to 26 dB in 1-dB Steps
  • Differential Input Impedance: 100 Ω
  • Differential Output with Common-Mode Control
  • Distortion at Max Gain (VO = 2 VPPD, RL = 200 Ω):
    • 200 MHz: HD2 at –73 dBc, HD3 at –80 dBc
    • 500 MHz: HD2 at –68 dBc, HD3 at –72 dBc
    • 1 GHz: HD2 at –63 dBc, HD3 at –63 dBc
    • 2 GHz: HD2 at –58 dBc, HD3 at –54 dBc
  • Output IP3:
    • 43 dBm at 200 MHz
    • 33 dBm at 1 GHz
    • 27 dBm at 2 GHz
  • Output IP2:
    • 67 dBm at 200 MHz
    • 60 dBm at 1 GHz
    • 52 dBm at 2 GHz
  • 8-dB Noise Figure at 1 GHz, RS = 100 Ω
  • 82-ps Rise, Fall Time Pulse Response
  • Supply Operation: 5.0 V at 69 mA
  • Supports Single- and (±) Split-Supply Operation:
    • DC- and AC-Coupled Applications
  • Fabricated on an Advanced Complementary BiCMOS Process
  • 3-mm × 3-mm UQFN-16 Package
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Description

The LMH6401 is a wideband, digitally-controlled, variable-gain amplifier (DVGA) designed for dc to radio frequency (RF), intermediate frequency (IF), and high-speed time-domain applications. The device is an ideal analog-to-digital converter (ADC) driver for dc- or ac-coupled applications that require an automatic gain control (AGC).

Noise and distortion performance is optimized to drive ultra-wideband ADCs. The amplifier has an 8-dB noise figure at maximum gain and a –63-dBc harmonic distortion at 1 GHz for full-scale signal levels. The device supports both single- and split-supply operation for driving an ADC. A common-mode reference input pin is provided to align the amplifier output common-mode with the ADC input requirements.

Gain control is performed via an SPI™ interface, allowing a 32-dB gain range from –6 dB to 26 dB in 1-dB steps. A power-down feature is also available through the external PD pin or SPI control.

This level of performance is achieved at a low power level of 345 mW. The operating ambient temperature range is –40°C to 85°C.

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Technical documentation

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Type Title Date
* Datasheet LMH6401 DC to 4.5 GHz, Fully-Differential, Digital Variable-Gain Amplifier datasheet (Rev. A) May 19, 2015
More literature The Signal e-book: A compendium of blog posts on op amp design topics Mar. 28, 2017
Selection guides TI Components for Aerospace and Defense Guide (Rev. E) Mar. 22, 2017
Application notes ADC32RF45: Amplifier to ADC Interface (Rev. A) Sep. 07, 2016
Technical articles Disentangle RF amplifier specs: output voltage/current and 1dB compression point Jun. 09, 2016
Technical articles Disentangle RF amplifier specs: intermodulation distortion and intercept points Apr. 19, 2016
Technical articles Disentangling RF amplifier specs: amplifier spot noise vs. noise figure Feb. 05, 2016
User guides TSW54J60 Evaluation Module User's Guide (Rev. A) Sep. 21, 2015
User guides LMH6401 EVM User's Guide (Rev. A) May 29, 2015

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Hardware development

EVALUATION BOARDS Download
document-generic User guide
$149.00
Description

The LMH6401 Evaluation module (EVM) is used to evaluate the single LMH6401, digitally-controlled variable-gain amplifier (DVGA) in a 16-lead high-performance RF package.  The EVM is designed to quickly and easily demonstrate the functionality and performance of LMH6401 across all the gain (...)

Features
  • Configured for split-supply operation and easily modified for single supply.
  • Designed for DC- or AC-coupled differential input and output connection.
  • Simple interface to the inputs and outputs through SMA connectors.
  • USB connector and FTDI USB-to-SPI bus-translator chip to successfully program the DVGA (...)
View details
EVALUATION BOARDS Download
document-generic User guide
$899.00
Description

The TSW54J60EVM is an evaluation module (EVM) that allows for the evaluation of Texas Instruments’ ADS54J60, LMH3401, LMH6401 and LMK04828 devices. The ADS54J60 is a low power, 16-bit, 1-GSPS analog to digital converter (ADC) with a buffered analog input and outputs featuring a JESD204B (...)

Features
  • Flexible transformer coupled analog input on the LMH6401 path to allow for a variety of sources and frequencies
  • Options for AC or DC coupling, single-ended or differential inputs
  • Easy to use software GUI to configure the ADS54J60, LMH6401 and LMK04828 for a variety of configurations through a USB (...)
View details
GUIS FOR EVALUATION MODULES (EVM) Download
SBOC451B.ZIP (204171 KB)

Design tools & simulation

SIMULATION MODELS Download
SBOM938.ZIP (14 KB) - TINA-TI Spice Model
SIMULATION MODELS Download
SBOM939A.TSC (58 KB) - TINA-TI Reference Design
SIMULATION MODELS Download
SNOM552.ZIP (21 KB) - IBIS Model

Reference designs

REFERENCE DESIGNS Download
Scalable 20.8 GSPS reference design for 12 bit digitizers
TIDA-010128 — This reference design describes a 20.8 GSPS sampling system using RF sampling analog-to-digital converters (ADCs) in time interleaved configuration. Time interleaving method is a proven and traditional way of increasing sample rate, however, matching individual ADCs offset, gain and sampling time (...)
document-generic Schematic document-generic User guide
REFERENCE DESIGNS Download
Reference design synchronizing data converter DDC and NCO features for multi-channel RF systems
TIDA-010122 — This reference design provides the solution for synchronization design challenges associated with emerging 5G adapted applications like massive multiple input multiple output (mMIMO), phase array RADAR and communication payload. The typical RF front end contains antenna, low noise amplifier (LNA (...)
document-generic Schematic document-generic User guide
REFERENCE DESIGNS Download
12.8-GSPS analog front end reference design for high-speed oscilloscope and wide-band digitizer
TIDA-01028 — This reference design provides a practical example of interleaved RF-sampling analog-to-digital converters (ADCs) to achieve a 12.8-GSPS sampling rate. This is achieved by time-terleaving two RF-sampling ADCs. Interleaving requires a phase shift between the ADCs, which this reference design achieves (...)
document-generic Schematic document-generic User guide
REFERENCE DESIGNS Download
Low noise power-supply reference design maximizing performance in 12.8 GSPS data acquisition systems
TIDA-01027 — This reference design demonstrates an efficient, low noise 5-rail power-supply design for very high-speed DAQ systems capable of > 12.8 GSPS. The power supply DC/DC converters are frequency synchronized and phase-shifted in order to minimize input current ripple and control frequency content (...)
document-generic Schematic document-generic User guide
REFERENCE DESIGNS Download
Flexible 3.2-GSPS multi-channel AFE reference design for DSOs, radar and 5G wireless test systems
TIDA-01022 — This high speed multi-channel data capture reference design enables optimum system performance. System designers needs to consider critical design parameters like clock jitter and skew for high speed multi-channel clock generation, which affects overall system SNR, SFDR, channel to channel skew and (...)
document-generic Schematic document-generic User guide
REFERENCE DESIGNS Download
16-Bit 1-GSPS Digitizer Reference Design with AC and DC Coupled Fixed Gain Amplifier
TIDA-00823 — This reference design discusses the use and performance of the Ultra-Wideband, Fixed-gain high-speed amplifier, the LMH3401 to drive the high-speed analog-to-digital converter (ADC), the ADS54J60 device. Different options for common-mode voltages, power supplies, and interfaces are discussed and (...)
document-generic Schematic document-generic User guide
REFERENCE DESIGNS Download
50-Ohm 2-GHz Oscilloscope Front-end Reference Design
TIDA-00826 — This reference design is part of an analog front-end for 50Ω-input oscilloscope application. System designers can readily use this evaluation platform to process input signals from DC to 2 GHz in both frequency-domain and time-domain applications.
document-generic Schematic document-generic User guide
REFERENCE DESIGNS Download
16-Bit 1-GSPS Digitizer Reference Design with AC and DC Coupled Variable Gain Amplifier
TIDA-00822 — This reference design discusses the use and performance of the Digital Variable-Gain high-speed amplifier, the LMH6401, to drive the high-speed analog-to-digital converter (ADC), the ADS54J60 device. Different options for common-mode voltages, power supplies, and interfaces are discussed and (...)
document-generic Schematic document-generic User guide
REFERENCE DESIGNS Download
Cascaded LMH5401 and LMH6401 Reference Design
TIDA-00654 — A wideband single-ended to differential conversion reference design in both DC- and AC- coupled applications is presented. The design evaluates the performance of the LMH5401 and LMH6401 cascade and offers insight into the design.
document-generic Schematic document-generic User guide

CAD/CAE symbols

Package Pins Download
UQFN-HR (RMZ) 16 View options

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Training series

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Videos

LMH6401 Digital Variable Gain Amplifier Product Overview

The 4.5 GHz, fully differential LMH6401 digital variable gain amplifier provides simple SPI serial control of gain between +26 dB and -6 dB in 1 dB steps.

Posted: 06-Jan-2017
Duration: 04:37

For more information about the LMH6401 check out the product web page

Related videos