LMK61E07 Ultra-Low Jitter Programmable Oscillator with Internal EEPROM | TI.com

LMK61E07 (ACTIVE) Ultra-Low Jitter Programmable Oscillator with Internal EEPROM

 

Description

The LMK61E07 family of ultra-low jitter PLLatinumTM programmable oscillators use fractional-N frequency synthesizers with integrated VCOs to generate commonly used reference clocks. The output on LMK61E07 can be configured as LVPECL, LVDS, or HCSL. The device features self start-up from on-chip EEPROM to generate a factory programmed default output frequency, or the device registers and EEPROM settings are fully programmable in-system through I2C serial interface. The device provides fine and coarse frequency margining control through I2C serial interface, making it a digitally-controlled oscillator (DCXO).

The PLL feedback divider can be updated to adjust the output frequency without spikes or glitches in steps of <1ppb using a PFD of 12.5 MHz (R divider=4, doubler disabled) for compatibility with xDSL requirements, or in steps of <5.2 ppb using a PFD of 100 MHz (R divider=1, doubler enabled) for compatibility with broadcast video requirements. The frequency margining features also facilitate system design verification tests (DVT), such as standards compliance and system timing margin testing.

Features

  • Ultra-Low Noise, High Performance
    • Jitter: 90-fs RMS Typical fOUT > 100 MHz on LMK61E07
    • PSRR: –70 dBc, Robust Supply Noise Immunity on LMK61E07
  • Flexible Output Format on LMK61E07
    • LVPECL up to 1 GHz
    • LVDS up to 900 MHz
    • HCSL up to 400 MHz
  • Total Frequency Tolerance of ±25 ppm
  • System Level Features
    • Glitch-Less Frequency Margining: Up to ±1000 ppm From Nominal
    • Internal EEPROM: User Configurable Start-Up Settings
  • Other Features
    • Device Control: Fast Mode I2C up to 1000 kHz
    • 3.3-V Operating Voltage
    • Industrial Temperature Range (–40ºC to +85ºC)
    • 7-mm × 5-mm 8-Pin Package
  • Default Frequency:
    • 70.656 MHz

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Parametrics

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Part number Order Features Output frequency (Max) (MHz) Output level Jitter (ps) Stability (ppm) VCC core (V) Operating temperature range (C)
LMK61E07 Order now Programmable with EEPROM
7x5mm    
1000     HCSL
LVDS
LVPECL    
0.150     25     3.3     -40 to 85    
LMK60E2-156M Order now Standard
7x5mm    
156.25     LVPECL     0.15     50     3.3     -40 to 85    
LMK61A2-100M Order now Standard
7x5mm    
100     LVDS     0.1     50     3.3     -40 to 85    
LMK61E0M Order now Standard
7x5mm    
200     LVCMOS     0.5     25     3.3     -40 to 85    
LMK61E2 Order now Programmable with EEPROM
7x5mm    
1000     HCSL
LVDS
LVPECL    
0.1     50     3.3     -40 to 85    
LMK62E2-156M Order now Standard
5x3.2mm    
156.25     LVPECL     0.15     50     3.3     -40 to 85