PGA112

ACTIVE

Zero-Drift, 100-µV offset, 12-nV/√Hz noise, RRO (binary gain) programmable gain amp with 2-CH MUX

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Product details

Parameters

PGA/VGA PGA Number of channels (#) 2 BW @ Acl (MHz) 10 Vs (Max) (V) 5.5 Vs (Min) (V) 2.2 Acl, min spec gain (V/V) 1 Gain (Max) (dB) 42 Slew rate (Typ) (V/us) 3 Operating temperature range (C) -40 to 125 open-in-new Find other Programmable & variable gain amplifiers (PGA/VGA)

Package | Pins | Size

VSSOP (DGS) 10 9 mm² 3 x 3 open-in-new Find other Programmable & variable gain amplifiers (PGA/VGA)

Features

  • Rail-to-Rail Input and Output
  • Offset: 25 µV (Typical), 100 µV
    (Maximum)
  • Zerø Drift: 0.35 µV/°C (Typical), 1.2 µV/°C
    (Maximum)
  • Low Noise: 12 nV/√Hz
  • Input Offset Current: ±5 nA Maximum (25°C)
  • Gain Error: 0.1% Maximum (G ≥ 32),
    0.3% Maximum (G > 32)
  • Binary Gains: 1, 2, 4, 8, 16, 32, 64, 128 (PGA112,
    PGA116)
  • Scope Gains: 1, 2, 5, 10, 20, 50, 100, 200
    (PGA113, PGA117)
  • Gain Switching Time: 200 ns
  • 2 Channel MUX: PGA112, PGA113
    10 Channel MUX: PGA116, PGA117
  • Four Internal Calibration Channels
  • Amplifier Optimized for Driving CDAC ADCs
  • Output Swing: 50 mV to Supply Rails
  • AVDD and DVDD for Mixed Voltage Systems
  • IQ = 1.1 mA (Typical)
  • Software and Hardware Shutdown: IQ ≤ 4 µA
    (Typical)
  • Temperature Range: –40°C to 125°C
  • SPI™ Interface (10 MHz) With Daisy-Chain
    Capability
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Description

The PGA112 and PGA113 devices (binary and scope gains) offer two analog inputs, a three-pin SPI interface, and software shutdown in a 10-pin, VSSOP package. The PGA116 and PGA117 (binary and scope gains) offer 10 analog inputs, a SPI interface with daisy-chain capability, and hardware and software shutdown in a 20-pin TSSOP package.

All versions provide internal calibration channels for system-level calibration. The channels are tied to GND, 0.9 VCAL, 0.1 VCAL, and VREF, respectively. VCAL, an external voltage connected to Channel 0, is used as the system calibration reference. Binary gains are: 1, 2, 4, 8, 16, 32, 64, and 128; scope gains are: 1, 2, 5, 10, 20, 50, 100, and 200.

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Same functionality and pinout but is not an equivalent to the compared device:
PGA113 ACTIVE Zero-Drift, 100-µV offset, 12-nV/√Hz noise, RRO (scope gain) programmable gain amp with 2-CH MUX This device offers scope gains 1, 2, 5, 10, 20, 50, 100, 200 instead of binary gains
Same functionality but is not pin-for-pin or parametrically equivalent to the compared device:
PGA116 ACTIVE Zero-Drift, 100-µV offset, 12-nV/√Hz noise, RRO (binary gain) programmable gain amp with 10-CH MUX This device offers 10 channel mux instead of 2 channel mux.
PGA117 ACTIVE Zero-Drift, 100-µV offset, 12-nV/√Hz noise, RRO (scope gain) programmable gain amp with 10-CH MUX This device offers 10 channel mux instead of 2 channel mux, and scope gains instead of binary gains

Technical documentation

= Top documentation for this product selected by TI
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Type Title Date
* Datasheet PGA11x Zerø-Drift Programmable Gain Amplifier With Mux datasheet (Rev. C) Nov. 30, 2015
User guides PGA112/113EVM Users Guide (Rev. A) May 17, 2012

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Hardware development

EVALUATION BOARDS Download
document-generic User guide
75
Description

The PGA112EVM is an evaluation module that is used to fully evaluate the PGA112 programmable gain amplifier. The PGA112EVM consists of two printed circuit boards (PCBs). One board (the SM-USB-DIG Platform) generates the digital signals required to communicate with the PGA112. The second board is the (...)

Features
  • Fully self-contained. Requires only a personal computer for complete evaluation platform.
  • Selectable Precision Input Options.
  • Convenient USB Interface.
  • Selectable Internal/External Power, I2C, and option for external input and output connection.

Software development

DRIVERS & LIBRARIES Download
SPRCAE5.ZIP (3864 KB)
SUPPORT SOFTWARE Download
SBOC272A.ZIP (99964 KB)
SUPPORT SOFTWARE Download
SBOC426.ZIP (1630 KB)

Design tools & simulation

SIMULATION TOOLS Download
PSpice® for TI design and simulation tool
PSPICE-FOR-TI — PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
Features
  • Leverages Cadence PSpice Technology
  • Preinstalled library with a suite of digital models to enable worst-case timing analysis
  • Dynamic updates ensure you have access to most current device models
  • Optimized for simulation speed without loss of accuracy
  • Supports simultaneous analysis of multiple products
  • (...)
SIMULATION TOOLS Download
SPICE-based analog simulation program
TINA-TI TINA-TI provides all the conventional DC, transient and frequency domain analysis of SPICE and much more. TINA has extensive post-processing capability that allows you to format results the way you want them. Virtual instruments allow you to select input waveforms and probe circuit nodes voltages (...)
document-generic User guide

CAD/CAE symbols

Package Pins Download
VSSOP (DGS) 10 View options

Ordering & quality

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