Zero-Drift, 100-µV offset, 12-nV/√Hz noise, RRO (binary gain) programmable gain amp with 2-CH MUX
Product details
Parameters
Package | Pins | Size
Features
- Rail-to-Rail Input and Output
- Offset: 25 µV (Typical), 100 µV
(Maximum) - Zerø Drift: 0.35 µV/°C (Typical), 1.2 µV/°C
(Maximum) - Low Noise: 12 nV/√Hz
- Input Offset Current: ±5 nA Maximum (25°C)
- Gain Error: 0.1% Maximum (G ≥ 32),
0.3% Maximum (G > 32) - Binary Gains: 1, 2, 4, 8, 16, 32, 64, 128 (PGA112,
PGA116) - Scope Gains: 1, 2, 5, 10, 20, 50, 100, 200
(PGA113, PGA117) - Gain Switching Time: 200 ns
- 2 Channel MUX: PGA112, PGA113
10 Channel MUX: PGA116, PGA117 - Four Internal Calibration Channels
- Amplifier Optimized for Driving CDAC ADCs
- Output Swing: 50 mV to Supply Rails
- AVDD and DVDD for Mixed Voltage Systems
- IQ = 1.1 mA (Typical)
- Software and Hardware Shutdown: IQ ≤ 4 µA
(Typical) - Temperature Range: –40°C to 125°C
- SPI™ Interface (10 MHz) With Daisy-Chain
Capability
Description
The PGA112 and PGA113 devices (binary and scope gains) offer two analog inputs, a three-pin SPI interface, and software shutdown in a 10-pin, VSSOP package. The PGA116 and PGA117 (binary and scope gains) offer 10 analog inputs, a SPI interface with daisy-chain capability, and hardware and software shutdown in a 20-pin TSSOP package.
All versions provide internal calibration channels for system-level calibration. The channels are tied to GND, 0.9 VCAL, 0.1 VCAL, and VREF, respectively. VCAL, an external voltage connected to Channel 0, is used as the system calibration reference. Binary gains are: 1, 2, 4, 8, 16, 32, 64, and 128; scope gains are: 1, 2, 5, 10, 20, 50, 100, and 200.
Same functionality and pinout but is not an equivalent to the compared device:
Same functionality but is not pin-for-pin or parametrically equivalent to the compared device:
Technical documentation
| Type | Title | Date | |
|---|---|---|---|
| * | Data sheet | PGA11x Zerø-Drift Programmable Gain Amplifier With Mux datasheet (Rev. C) | Nov. 30, 2015 |
| User guide | PGA112/113EVM Users Guide (Rev. A) | May 17, 2012 |
Design & development
For additional terms or required resources, click any title below to view the detail page where available.Hardware development
Description
The PGA112EVM is an evaluation module that is used to fully evaluate the PGA112 programmable gain amplifier. The PGA112EVM consists of two printed circuit boards (PCBs). One board (the SM-USB-DIG Platform) generates the digital signals required to communicate with the PGA112. The second board is the (...)
Features
- Fully self-contained. Requires only a personal computer for complete evaluation platform.
- Selectable Precision Input Options.
- Convenient USB Interface.
- Selectable Internal/External Power, I2C, and option for external input and output connection.
Software development
Design tools & simulation
Features
- Leverages Cadence PSpice Technology
- Preinstalled library with a suite of digital models to enable worst-case timing analysis
- Dynamic updates ensure you have access to most current device models
- Optimized for simulation speed without loss of accuracy
- Supports simultaneous analysis of multiple products
- (...)
CAD/CAE symbols
| Package | Pins | Download |
|---|---|---|
| VSSOP (DGS) | 10 | View options |
Ordering & quality
- RoHS
- REACH
- Device marking
- Lead finish/Ball material
- MSL rating/Peak reflow
- MTBF/FIT estimates
- Material content
- Qualification summary
- Ongoing reliability monitoring
Support & training
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