This 4-bit non-inverting bus
transceiver uses two separate configurable power-supply rails. The A port is
designed to track VCCA. VCCA accepts any supply voltage from
1.2V to 3.6V. The B port is designed to track VCCB. VCCB
accepts any supply voltage from 1.2V to 3.6V. The
SN74AVC4T245-Q1 is optimized to operate with
VCCA/VCCB set at 1.4V to 3.6V. It is operational with
VCCA/VCCB as low as 1.2V. This allows for universal
low-voltage bidirectional translation between any of the 1.2V, 1.5V, 1.8V, 2.5V,
and 3.3V voltage nodes.
The SN74AVC4T245-Q1 is designed for asynchronous communication between two
data buses. The logic levels of the direction-control (DIR) input and the
output-enable ( OE) input activate either the B-port outputs or
the A-port outputs or place both output ports into the high-impedance mode. The
device transmits data from the A bus to the B bus when the B-port outputs are
activated, and from the B bus to the A bus when the A-port outputs are activated.
The input circuitry on both A and B ports is always active and must have a logic
HIGH or LOW level applied to prevent excess ICC and ICCZ.
The SN74AVC4T245-Q1 is
designed so that the control pins (1DIR, 2DIR, 1 OE, and 2
OE) are supplied by VCCA.
This device is fully specified for
partial-power-down applications using Ioff. The Ioff circuitry
disables the outputs, preventing damaging current backflow through the device when
it is powered down.
The design of the VCC
isolation feature places both ports in the high-impedance state if either
VCC input is at GND.
To place the device in the
high-impedance state during power up or power down, tie OE to
VCC through a pullup resistor; the current-sinking capability of the
driver determines the minimum value of the resistor.
This 4-bit non-inverting bus
transceiver uses two separate configurable power-supply rails. The A port is
designed to track VCCA. VCCA accepts any supply voltage from
1.2V to 3.6V. The B port is designed to track VCCB. VCCB
accepts any supply voltage from 1.2V to 3.6V. The
SN74AVC4T245-Q1 is optimized to operate with
VCCA/VCCB set at 1.4V to 3.6V. It is operational with
VCCA/VCCB as low as 1.2V. This allows for universal
low-voltage bidirectional translation between any of the 1.2V, 1.5V, 1.8V, 2.5V,
and 3.3V voltage nodes.
The SN74AVC4T245-Q1 is designed for asynchronous communication between two
data buses. The logic levels of the direction-control (DIR) input and the
output-enable ( OE) input activate either the B-port outputs or
the A-port outputs or place both output ports into the high-impedance mode. The
device transmits data from the A bus to the B bus when the B-port outputs are
activated, and from the B bus to the A bus when the A-port outputs are activated.
The input circuitry on both A and B ports is always active and must have a logic
HIGH or LOW level applied to prevent excess ICC and ICCZ.
The SN74AVC4T245-Q1 is
designed so that the control pins (1DIR, 2DIR, 1 OE, and 2
OE) are supplied by VCCA.
This device is fully specified for
partial-power-down applications using Ioff. The Ioff circuitry
disables the outputs, preventing damaging current backflow through the device when
it is powered down.
The design of the VCC
isolation feature places both ports in the high-impedance state if either
VCC input is at GND.
To place the device in the
high-impedance state during power up or power down, tie OE to
VCC through a pullup resistor; the current-sinking capability of the
driver determines the minimum value of the resistor.