SN74HC623

Name: SN74HC623
Brand: TI
SKU: SN74HC623
Price: 3.153 USD

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Oktal-Bustransceiver mit Tri-State-Ausgängen

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Datenblatt

document-pdfAcrobat SN54HC623, SN74HC623 datasheet (Rev. C) (Englisch)

SN74HC623

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Datenblatt

Jetzt bestellen

Produktdetails

Supply voltage (min) (V)

2

Supply voltage (max) (V)

6

Number of channels

8

IOL (max) (mA)

7.8

IOH (max) (mA)

-7.8

Input type

CMOS

Output type

CMOS

Features

Balanced outputs, High speed (tpd 10-50ns), Positive input clamp diode

Technology family

HC

Rating

Catalog

Operating temperature range (°C)

-40 to 85

Supply voltage (min) (V)

2

Supply voltage (max) (V)

6

Number of channels

8

IOL (max) (mA)

7.8

IOH (max) (mA)

-7.8

Input type

CMOS

Output type

CMOS

Features

Balanced outputs, High speed (tpd 10-50ns), Positive input clamp diode

Technology family

HC

Rating

Catalog

Operating temperature range (°C)

-40 to 85

PDIP (N)

20

228.702 mm² 24.33 x 9.4

SOIC (DW)

20

131.84 mm² 12.8 x 10.3

SOP (NS)

20

98.28 mm² 12.6 x 7.8

Wide Operating Voltage Range of 2 V to 6 V
High-Current 3-State Outputs Can Drive Up To 15 LSTTL Loads
Low Power Consumption, 80-µA Max I_CC
Typical t_pd = 8 ns
±6-mA Output Drive at 5 V
Low Input Current of 1 µA Max
Lock Bus-Latch Capability
True Logic

Wide Operating Voltage Range of 2 V to 6 V
High-Current 3-State Outputs Can Drive Up To 15 LSTTL Loads
Low Power Consumption, 80-µA Max I_CC
Typical t_pd = 8 ns
±6-mA Output Drive at 5 V
Low Input Current of 1 µA Max
Lock Bus-Latch Capability
True Logic

These octal bus transceivers are designed for asynchronous two-way communication between data buses. The control-function implementation allows for maximum flexibility in timing.

The ’HC623 devices allow data transmission from the A bus to the B bus or from the B bus to the A bus, depending upon the logic levels at the output-enable (OEAB and OEBA\) inputs.

OEAB and OEBA\ disable the device so that the buses are effectively isolated. The dual-enable configuration gives the transceivers the capability to store data by simultaneously enabling OEAB and OEBA\. Each output reinforces its input in this transceiver configuration. When both OEAB and OEBA\ are enabled and all other data sources to the two sets of bus lines are in the high-impedance state, both sets of bus lines (16 total) remain at their last states. The 8-bit codes appearing on the two sets of buses are identical.

These octal bus transceivers are designed for asynchronous two-way communication between data buses. The control-function implementation allows for maximum flexibility in timing.

The ’HC623 devices allow data transmission from the A bus to the B bus or from the B bus to the A bus, depending upon the logic levels at the output-enable (OEAB and OEBA\) inputs.

OEAB and OEBA\ disable the device so that the buses are effectively isolated. The dual-enable configuration gives the transceivers the capability to store data by simultaneously enabling OEAB and OEBA\. Each output reinforces its input in this transceiver configuration. When both OEAB and OEBA\ are enabled and all other data sources to the two sets of bus lines are in the high-impedance state, both sets of bus lines (16 total) remain at their last states. The 8-bit codes appearing on the two sets of buses are identical.

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Alle anzeigen 14

	Typ	Titel	Datum
*	Data sheet	SN54HC623, SN74HC623 datasheet (Rev. C)	13 Dez 2002
	Application note	Implications of Slow or Floating CMOS Inputs (Rev. E)	26 Jul 2021
	Selection guide	Logic Guide (Rev. AB)	12 Jun 2017
	Application note	Understanding and Interpreting Standard-Logic Data Sheets (Rev. C)	02 Dez 2015
	User guide	LOGIC Pocket Data Book (Rev. B)	16 Jan 2007
	Application note	Semiconductor Packing Material Electrostatic Discharge (ESD) Protection	08 Jul 2004
	User guide	Signal Switch Data Book (Rev. A)	14 Nov 2003
	Application note	TI IBIS File Creation, Validation, and Distribution Processes	29 Aug 2002
	Application note	CMOS Power Consumption and CPD Calculation (Rev. B)	01 Jun 1997
	Application note	Designing With Logic (Rev. C)	01 Jun 1997
	Application note	Input and Output Characteristics of Digital Integrated Circuits	01 Okt 1996
	Application note	Live Insertion	01 Okt 1996
	Application note	SN54/74HCT CMOS Logic Family Applications and Restrictions	01 Mai 1996
	Application note	Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc	01 Apr 1996

Design und Entwicklung

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Evaluierungsplatine

14-24-LOGIC-EVM — Generisches Logikprodukt-Evaluierungsmodul für 14-polige bis 24-polige D-, DB-, DGV-, DW-, DYY-, NS-

Das 14-24-LOGIC-EVM-Evaluierungsmodul (EVM) ist für die Unterstützung aller Logikgeräte konzipiert, die sich in einem 14-Pin- bis 24-Pin-D-, DW-, DB-, NS-, PW-, DYY- oder DGV-Gehäuse befinden.

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Gehäuse	Pins	Herunterladen
PDIP (N)	20	Optionen anzeigen
SOIC (DW)	20	Optionen anzeigen
SOP (NS)	20	Optionen anzeigen

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SN74HC623

Oktal-Bustransceiver mit Tri-State-Ausgängen

SN74HC623

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