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THS6182

AKTIV

Energieeffizienter Leitungstreiber für ADSL und PLC

Produktdetails

Number of channels 2 Architecture DSL Line Driver, PLC Line Driver Total supply voltage (+5 V = 5, ±5 V = 10) (min) (V) 8 Total supply voltage (+5 V = 5, ±5 V = 10) (max) (V) 33 BW at Acl (MHz) 100 Acl, min spec gain (V/V) 1 Vn at flatband (typ) (nV√Hz) 3.2 Vn at 1 kHz (typ) (nV√Hz) 13 Iq per channel (typ) (mA) 11.5 Vos (offset voltage at 25°C) (max) (mV) 20 Rail-to-rail No Features Adjustable BW/IQ/IOUT, Shutdown Rating Catalog Operating temperature range (°C) -40 to 85 CMRR (typ) (dB) 54 Input bias current (max) (pA) 15000000 Offset drift (typ) (µV/°C) 50 GBW (typ) (MHz) 100 Iout (typ) (mA) 600 2nd harmonic (dBc) 88 3rd harmonic (dBc) 107 Frequency of harmonic distortion measurement (MHz) 1
Number of channels 2 Architecture DSL Line Driver, PLC Line Driver Total supply voltage (+5 V = 5, ±5 V = 10) (min) (V) 8 Total supply voltage (+5 V = 5, ±5 V = 10) (max) (V) 33 BW at Acl (MHz) 100 Acl, min spec gain (V/V) 1 Vn at flatband (typ) (nV√Hz) 3.2 Vn at 1 kHz (typ) (nV√Hz) 13 Iq per channel (typ) (mA) 11.5 Vos (offset voltage at 25°C) (max) (mV) 20 Rail-to-rail No Features Adjustable BW/IQ/IOUT, Shutdown Rating Catalog Operating temperature range (°C) -40 to 85 CMRR (typ) (dB) 54 Input bias current (max) (pA) 15000000 Offset drift (typ) (µV/°C) 50 GBW (typ) (MHz) 100 Iout (typ) (mA) 600 2nd harmonic (dBc) 88 3rd harmonic (dBc) 107 Frequency of harmonic distortion measurement (MHz) 1
HSOIC (DWP) 20 133.444125 mm² 12.825 x 10.405 SOIC (D) 16 59.4 mm² 9.9 x 6 SOIC (DW) 20 131.84 mm² 12.8 x 10.3 VQFN (RHF) 24 20 mm² 5 x 4
  • Low-Power Dissipation Increases ADSL Line Card Density
  • Low THD of -88 dBc (100 , 1 MHz)
  • Low MTPR Driving +20 dBm on the Line
    • -76 dBc With High Bias Setting
    • -74 dBc With Low Bias Setting
  • Wide Output Swing of 44 VPP Differential Into a 200- Differential Load (VCC = ±12 V)
  • High Output Current of 600 mA (Typ)
  • Wide Supply Voltage Range of ±5 V to ±15 V
  • Pin Compatible with EL1503C and EL1508C
    • Multiple Package Options
  • Multiple Power Control Modes
    • 11 mA/ch Full Bias Mode
    • 7.5 mA/ch Mid Bias Mode
    • 4 mA/ch Low Bias Mode
    • 0.25 mA/ch Shutdown Mode
    • IADJ Pin for User Controlled Bias Current
    • Stable Operation Down to 1.8 mA/ch
  • Low Noise for Increased Receiver Sensitivity
    • 3.2 nV/Hz Inverting Current Noise
  • APPLICATIONS
    • Ideal for Full Rate ADSL Applications

PowerPAD is a trademark of Texas Instruments.

  • Low-Power Dissipation Increases ADSL Line Card Density
  • Low THD of -88 dBc (100 , 1 MHz)
  • Low MTPR Driving +20 dBm on the Line
    • -76 dBc With High Bias Setting
    • -74 dBc With Low Bias Setting
  • Wide Output Swing of 44 VPP Differential Into a 200- Differential Load (VCC = ±12 V)
  • High Output Current of 600 mA (Typ)
  • Wide Supply Voltage Range of ±5 V to ±15 V
  • Pin Compatible with EL1503C and EL1508C
    • Multiple Package Options
  • Multiple Power Control Modes
    • 11 mA/ch Full Bias Mode
    • 7.5 mA/ch Mid Bias Mode
    • 4 mA/ch Low Bias Mode
    • 0.25 mA/ch Shutdown Mode
    • IADJ Pin for User Controlled Bias Current
    • Stable Operation Down to 1.8 mA/ch
  • Low Noise for Increased Receiver Sensitivity
    • 3.2 nV/Hz Inverting Current Noise
  • APPLICATIONS
    • Ideal for Full Rate ADSL Applications

PowerPAD is a trademark of Texas Instruments.

The THS6182 is a current feedback differential line driver ideal for full rate ADSL systems. Its extremely low-power dissipation is ideal for ADSL systems that must achieve high densities in ADSL central office rack applications. The unique architecture of the THS6182 allows the quiescent current to be much lower than existing line drivers while still achieving high linearity without the need for excess open loop gain. Fixed multiple bias settings of the amplifiers allow for enhanced power savings for line lengths where the full performance of the amplifier is not required. To allow for even more flexibility and power savings, an IADJ pin is available to further lower the bias currents while maintaining stable operation with as little as 1.8 mA per channel. The wide output swing of 44 VPP differentially with ±12-V power supplies allows for more dynamic headroom, keeping distortion at a minimum. With a low 3.2 nV/Hz inverting current noise, the THS6182 increases the sensitivity of the receive signals, allowing for better margins and reach.

The THS6182 is a current feedback differential line driver ideal for full rate ADSL systems. Its extremely low-power dissipation is ideal for ADSL systems that must achieve high densities in ADSL central office rack applications. The unique architecture of the THS6182 allows the quiescent current to be much lower than existing line drivers while still achieving high linearity without the need for excess open loop gain. Fixed multiple bias settings of the amplifiers allow for enhanced power savings for line lengths where the full performance of the amplifier is not required. To allow for even more flexibility and power savings, an IADJ pin is available to further lower the bias currents while maintaining stable operation with as little as 1.8 mA per channel. The wide output swing of 44 VPP differentially with ±12-V power supplies allows for more dynamic headroom, keeping distortion at a minimum. With a low 3.2 nV/Hz inverting current noise, the THS6182 increases the sensitivity of the receive signals, allowing for better margins and reach.

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Technische Dokumentation

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Alle anzeigen 5
Typ Titel Datum
* Data sheet Low-Power Dissipation ADSL Line Driver datasheet (Rev. H) 11 Jun 2007
E-book The Signal e-book: A compendium of blog posts on op amp design topics 28 Mär 2017
Application note Wireline Data Transmission and Reception 27 Jan 2010
Application note Noise Analysis for High Speed Op Amps (Rev. A) 17 Jan 2005
EVM User's guide THS6182RHFEVM 05 Aug 2003

Design und Entwicklung

Weitere Bedingungen oder erforderliche Ressourcen enthält gegebenenfalls die Detailseite, die Sie durch Klicken auf einen der unten stehenden Titel erreichen.

Evaluierungsplatine

THS6182DWEVM — THS6182DW-Evaluierungsmodul

Benutzerhandbuch: PDF
Simulationsmodell

THS6182 PSpice Model (Rev. C)

SLOJ165C.ZIP (58 KB) - PSpice Model
Simulationsmodell

THS6182 TINA-TI Reference Design (Rev. C)

SLAC112C.TSC (98 KB) - TINA-TI Reference Design
Simulationsmodell

THS6182 TINA-TI Spice Model (Rev. A)

SLAM041A.ZIP (5 KB) - TINA-TI Spice Model
Simulationstool

PSPICE-FOR-TI — PSpice® für TI Design-und Simulationstool

PSpice® für TI ist eine Design- und Simulationsumgebung, welche Sie dabei unterstützt, die Funktionalität analoger Schaltungen zu evaluieren. Diese voll ausgestattete Design- und Simulationssuite verwendet eine analoge Analyse-Engine von Cadence®. PSpice für TI ist kostenlos erhältlich und (...)
Simulationstool

TINA-TI — SPICE-basiertes analoges Simulationsprogramm

TINA-TI provides all the conventional DC, transient and frequency domain analysis of SPICE and much more. TINA has extensive post-processing capability that allows you to format results the way you want them. Virtual instruments allow you to select input waveforms and probe circuit nodes voltages (...)
Benutzerhandbuch: PDF
Gehäuse Pins Herunterladen
HSOIC (DWP) 20 Optionen anzeigen
SOIC (D) 16 Optionen anzeigen
SOIC (DW) 20 Optionen anzeigen
VQFN (RHF) 24 Optionen anzeigen

Bestellen & Qualität

Beinhaltete Information:
  • RoHS
  • REACH
  • Bausteinkennzeichnung
  • Blei-Finish/Ball-Material
  • MSL-Rating / Spitzenrückfluss
  • MTBF-/FIT-Schätzungen
  • Materialinhalt
  • Qualifikationszusammenfassung
  • Kontinuierliches Zuverlässigkeitsmonitoring
Beinhaltete Information:
  • Werksstandort
  • Montagestandort

Support und Schulungen

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