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TL16C451

ACTIVO

UART simple con puerto paralelo y sin FIFO

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TL16C451

ACTIVO
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Detalles del producto

Number of channels 1 FIFO (Byte) 0 Programmable FIFO trigger levels No CPU interface X86 Baud rate at Vcc = 5 V & with 16x sampling (max) (MBps) 0.256 Operating voltage (V) 5 Auto RTS/CTS No Rating Catalog Operating temperature range (°C) 0 to 70
Number of channels 1 FIFO (Byte) 0 Programmable FIFO trigger levels No CPU interface X86 Baud rate at Vcc = 5 V & with 16x sampling (max) (MBps) 0.256 Operating voltage (V) 5 Auto RTS/CTS No Rating Catalog Operating temperature range (°C) 0 to 70
PLCC (FN) 68 632.5225 mm² 25.15 x 25.15
  • Integrates Most Communications Card Functions From the IBM PC/ATTM or Compatibles With Single- or Dual-Channel Serial Ports
  • TL16C451 Consists of One TL16C450 Plus Centronix Printer Interface
  • TL16C452 Consists of Two TL16C450s Plus a Centronix-Type Printer Interface
  • Fully Programmable Serial Interface Characteristics:
    • 5-, 6-, 7-, or 8-Bit Characters
    • Even-, Odd-, or No-Parity Bit Generation and Detection
    • 1-, 1 1/2-, or 2 Stop-Bit Generation
    • Programmable Baud Rate
      (dc to 256 kbit/s)
  • Fully Double Buffered for Reliable
    Asynchronous Operation

    • IBM PC/AT is a trademark of International Business Machines Corporation.
  • Integrates Most Communications Card Functions From the IBM PC/ATTM or Compatibles With Single- or Dual-Channel Serial Ports
  • TL16C451 Consists of One TL16C450 Plus Centronix Printer Interface
  • TL16C452 Consists of Two TL16C450s Plus a Centronix-Type Printer Interface
  • Fully Programmable Serial Interface Characteristics:
    • 5-, 6-, 7-, or 8-Bit Characters
    • Even-, Odd-, or No-Parity Bit Generation and Detection
    • 1-, 1 1/2-, or 2 Stop-Bit Generation
    • Programmable Baud Rate
      (dc to 256 kbit/s)
  • Fully Double Buffered for Reliable
    Asynchronous Operation

    • IBM PC/AT is a trademark of International Business Machines Corporation.

The TL16C451 and TL16C452 provide single- and dual-channel (respectively) serial interfaces along with a single Centronix-type parallel-port interface. The serial interfaces provide a serial-to-parallel conversion for data received from a peripheral device or modem and a parallel-to-serial conversion for data transmitted by a CPU. The parallel interface provides a bidirectional parallel data port that fully conforms to the requirements for a Centronix-type printer interface. A CPU can read the status of the asynchronous communications element (ACE) interfaces at any point in the operation. The status includes the state of the modem signals (CTS\, DSR\, RLSD\, and RI) and any changes to these signals that have occurred since the last time they were read, the state of the transmitter and receiver including errors detected on received data, and printer status. The TL16C451 and TL16C452 provide control for modem signals (RTS\ and DTR\), interrupt enables, baud rate programming, and parallel-port control signals.

The TL16C451 and TL16C452 provide single- and dual-channel (respectively) serial interfaces along with a single Centronix-type parallel-port interface. The serial interfaces provide a serial-to-parallel conversion for data received from a peripheral device or modem and a parallel-to-serial conversion for data transmitted by a CPU. The parallel interface provides a bidirectional parallel data port that fully conforms to the requirements for a Centronix-type printer interface. A CPU can read the status of the asynchronous communications element (ACE) interfaces at any point in the operation. The status includes the state of the modem signals (CTS\, DSR\, RLSD\, and RI) and any changes to these signals that have occurred since the last time they were read, the state of the transmitter and receiver including errors detected on received data, and printer status. The TL16C451 and TL16C452 provide control for modem signals (RTS\ and DTR\), interrupt enables, baud rate programming, and parallel-port control signals.
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Documentación técnica

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Tipo Título Fecha
* Data sheet Asynchronous Communications Elements datasheet (Rev. C) 05 ago 1999
Product overview UART Quick Reference Card (Rev. D) 09 abr 2008

Diseño y desarrollo

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  • Estimaciones de tiempo medio entre fallas (MTBF)/fallas en el tiempo (FIT)
  • Contenido del material
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  • Monitoreo continuo de confiabilidad
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