Inicio Gestión de la energía Controladores de compuertas Drivers de compuerta aislados
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Gestión de la energía
Controladores de compuertas
Drivers de compuerta aislados

UCC21520-Q1

ACTIVO

Controlador de compuerta de doble canal aislado de 4 A, 6 A y 5.7 kVRMS para automoción con doble en

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NUEVO UCC21550-Q1 ACTIVO Controlador de puerta aislado autootriz de 4 A a 6 A, 5 kVrms y canal doble con pines DIS y DT para Tighter VCCI range supporting digital controller thresholds. New DT equation. Increased CMTI and wider operating temperature range.

UCC21520-Q1

ACTIVO
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Detalles del producto

Number of channels 2 Isolation rating Reinforced Withstand isolation voltage (VISO) (Vrms) 5700 Working isolation voltage (VIOWM) (Vrms) 2121 Transient isolation voltage (VIOTM) (VPK) 8000 Power switch IGBT, MOSFET, SiCFET Peak output current (A) 6 Features Disable, Programmable dead time Output VCC/VDD (max) (V) 25 Output VCC/VDD (min) (V) 6.5, 9.2 Input supply voltage (min) (V) 3 Input supply voltage (max) (V) 18 TI functional safety category Functional Safety Quality-Managed Propagation delay time (µs) 0.019 Input threshold CMOS, TTL Operating temperature range (°C) -40 to 125 Rating Automotive Bootstrap supply voltage (max) (V) 2121 Rise time (ns) 6 Fall time (ns) 8 Undervoltage lockout (typ) (V) 5, 8
Number of channels 2 Isolation rating Reinforced Withstand isolation voltage (VISO) (Vrms) 5700 Working isolation voltage (VIOWM) (Vrms) 2121 Transient isolation voltage (VIOTM) (VPK) 8000 Power switch IGBT, MOSFET, SiCFET Peak output current (A) 6 Features Disable, Programmable dead time Output VCC/VDD (max) (V) 25 Output VCC/VDD (min) (V) 6.5, 9.2 Input supply voltage (min) (V) 3 Input supply voltage (max) (V) 18 TI functional safety category Functional Safety Quality-Managed Propagation delay time (µs) 0.019 Input threshold CMOS, TTL Operating temperature range (°C) -40 to 125 Rating Automotive Bootstrap supply voltage (max) (V) 2121 Rise time (ns) 6 Fall time (ns) 8 Undervoltage lockout (typ) (V) 5, 8
SOIC (DW) 16 106.09 mm² 10.3 x 10.3
  • Qualified for automotive applications
  • AEC-Q100 qualified with the following results
    • Device temperature grade 1
    • Device HBM ESD classification level H2
    • Device CDM ESD classification level C6
  • Functional safety quality-managed
  • Operating temperature range –40 to +125°C
  • Switching parameters:
    • 19-ns typical propagation delay
    • 10-ns minimum pulse width
    • 5-ns maximum delay matching
    • 6-ns maximum pulse-width distortion
  • Common-mode transient immunity (CMTI) greater than 100 V/ns
  • Surge immunity up to 12.8 kV
  • Isolation barrier life >40 years
  • 4-A peak source, 6-A peak sink output
  • 3-V to 18-V input VCCI range to interface with both digital and analog controllers
  • Up to 25-V VDD output drive supply
    • 5-V and 8-V VDD UVLO options
  • Programmable overlap and dead time
  • Rejects input pulses and noise transients shorter than 5 ns
  • Fast disable for power sequencing
  • Safety-related certifications:
    • 8000-VPK reinforced Isolation per DIN V VDE V 0884-11:2017-01
    • 5.7-kVRMS isolation for 1 minute per UL 1577
    • CSA certification per IEC 60950-1, IEC 62368-1, IEC 61010-1 and IEC 60601-1 end equipment standards
    • CQC certification per GB4943.1-2011
  • Qualified for automotive applications
  • AEC-Q100 qualified with the following results
    • Device temperature grade 1
    • Device HBM ESD classification level H2
    • Device CDM ESD classification level C6
  • Functional safety quality-managed
  • Operating temperature range –40 to +125°C
  • Switching parameters:
    • 19-ns typical propagation delay
    • 10-ns minimum pulse width
    • 5-ns maximum delay matching
    • 6-ns maximum pulse-width distortion
  • Common-mode transient immunity (CMTI) greater than 100 V/ns
  • Surge immunity up to 12.8 kV
  • Isolation barrier life >40 years
  • 4-A peak source, 6-A peak sink output
  • 3-V to 18-V input VCCI range to interface with both digital and analog controllers
  • Up to 25-V VDD output drive supply
    • 5-V and 8-V VDD UVLO options
  • Programmable overlap and dead time
  • Rejects input pulses and noise transients shorter than 5 ns
  • Fast disable for power sequencing
  • Safety-related certifications:
    • 8000-VPK reinforced Isolation per DIN V VDE V 0884-11:2017-01
    • 5.7-kVRMS isolation for 1 minute per UL 1577
    • CSA certification per IEC 60950-1, IEC 62368-1, IEC 61010-1 and IEC 60601-1 end equipment standards
    • CQC certification per GB4943.1-2011

The UCC21520-Q1 is an isolated dual-channel gate drivers with 4-A source and 6-A sink peak current. It is designed to drive power MOSFETs, IGBTs, and SiC MOSFETs up to 5-MHz with best-in-class propagation delay and pulse-width distortion.

The input side is isolated from the two output drivers by a 5.7-kVRMS reinforced isolation barrier, with a minimum of 100-V/ns common-mode transient immunity (CMTI). Internal functional isolation between the two secondary-side drivers allows a working voltage of up to 1500 VDC.

Every driver can be configured as two low-side drivers, two high-side drivers, or a half-bridge driver with programmable dead time (DT). A disable pin shuts down both outputs simultaneously, and allows normal operation when left open or grounded. As a fail-safe measure, primary-side logic failures force both outputs low.

Each device accepts VDD supply voltages up to 25 V. A wide input VCCI range from 3 V to 18 V makes the driver suitable for interfacing with both analog and digital controllers. All supply voltage pins have under voltage lock-out (UVLO) protection.

With all these advanced features, the UCC21520-Q1 enables high efficiency, high power density, and robustness.

The UCC21520-Q1 is an isolated dual-channel gate drivers with 4-A source and 6-A sink peak current. It is designed to drive power MOSFETs, IGBTs, and SiC MOSFETs up to 5-MHz with best-in-class propagation delay and pulse-width distortion.

The input side is isolated from the two output drivers by a 5.7-kVRMS reinforced isolation barrier, with a minimum of 100-V/ns common-mode transient immunity (CMTI). Internal functional isolation between the two secondary-side drivers allows a working voltage of up to 1500 VDC.

Every driver can be configured as two low-side drivers, two high-side drivers, or a half-bridge driver with programmable dead time (DT). A disable pin shuts down both outputs simultaneously, and allows normal operation when left open or grounded. As a fail-safe measure, primary-side logic failures force both outputs low.

Each device accepts VDD supply voltages up to 25 V. A wide input VCCI range from 3 V to 18 V makes the driver suitable for interfacing with both analog and digital controllers. All supply voltage pins have under voltage lock-out (UVLO) protection.

With all these advanced features, the UCC21520-Q1 enables high efficiency, high power density, and robustness.

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El manual de seguridad UCC21520-Q1 y el informe de tasa de ajuste de seguridad están disponibles. Solicitar ahora

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Documentación técnica

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* Data sheet UCC21520-Q1, UCC21520A-Q1 4-A, 6-A, 5.7-kVRMS Isolated Dual-Channel Gate Driver for Automotive datasheet (Rev. D) PDF | HTML 12 may 2020
Certificate VDE Certificate for Reinforced Isolation for DIN EN IEC 60747-17 (Rev. S) 29 feb 2024
Application note Impact of Narrow Pulse Widths in Gate Driver Circuits (Rev. A) PDF | HTML 25 ene 2024
Certificate UCC215xx CQC Certificate of Product Certification 17 ago 2023
Certificate UCC21520 CQC Certificate of Product Certification (Rev. A) 16 ago 2023
Certificate UL Certification E181974 Vol 4. Sec 7 (Rev. C) 02 dic 2022
Application brief The Use and Benefits of Ferrite Beads in Gate Drive Circuits PDF | HTML 16 dic 2021
EVM User's guide Using the UCC21520EVM-286, UCC21521CEVM-286, and UCC21530EVM286 User's Guide (Rev. C) PDF | HTML 21 oct 2021
More literature Protecting Power Devices in Electric Vehicle Applications 23 mar 2021
Application brief External Gate Resistor Selection Guide (Rev. A) 28 feb 2020
Application brief Understanding Peak IOH and IOL Currents (Rev. A) 28 feb 2020
Certificate CSA Product Certificate (Rev. A) 15 ago 2019
User guide Gate Drive Voltage vs. Efficiency 25 abr 2019
White paper Driving the future of HEV/EV with high-voltage solutions (Rev. B) 16 may 2018
Application brief Reducing Switching Losses in On-Board Chargers for Electric Vehicles 27 mar 2018
White paper Cities grow smarter through innovative semiconductor technologies 07 jul 2017
White paper Charging stations: Toward an EV support infrastructure 09 may 2017
Application note UCC21520, a Universal Isolated Gate Driver with Fast Dynamic Response (Rev. A) PDF | HTML 05 jul 2016

Diseño y desarrollo

Para conocer los términos adicionales o los recursos necesarios, haga clic en cualquier título de abajo para ver la página de detalles cuando esté disponible.

Placa de evaluación

UCC21520EVM-286 — Módulo de evaluación UCC21520 de controlador de puerta aislada de doble canal (4 A/6 A)

UCC21520EVM-286 is designed for evaluating UCC21520DW, which is an isolated dual-channel gate driver with 4-A source and 6-A sink peak current capability. This EVM could be served as a reference design for driving power MOSFETS, IGBTS, and SiC MOSFETS with UCC21520 pin function identification, (...)

Guía del usuario: PDF | HTML
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Modelo de simulación

UCC21520 PSpice Transient Model

SLUM544.ZIP (59 KB) - PSpice Model
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Modelo de simulación

UCC21520 TINA-TI Reference Design

SLUM552.TSC (168 KB) - TINA-TI Reference Design
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Modelo de simulación

UCC21520 TINA-TI Transient Spice Model

SLUM551.ZIP (23 KB) - TINA-TI Spice Model
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Modelo de simulación

UCC21520 Unencrypted PSpice Transient Model

SLUM543.ZIP (3 KB) - PSpice Model
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Herramienta de simulación

PSPICE-FOR-TI — PSpice® para herramienta de diseño y simulación de TI

PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
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Diseños de referencia

TIDA-01604 — Diseño de referencia PFC de polo tótem de 6.6 kW, con una eficiencia del 98.6 % para cargador integr

This reference design functions from a base of silicon carbide (SiC) MOSFETs that are driven by a C2000 microcontroller (MCU) with SiC-isolated gate drivers. The design implements three-phase interleaving and operates in continuous conduction mode (CCM) to achieve a 98.46% efficiency at a 240-V (...)
Design guide: PDF
Esquema: PDF
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SOIC (DW) 16 Ver opciones
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Pedidos y calidad

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  • Marcado del dispositivo
  • Acabado de plomo/material de la bola
  • Clasificación de nivel de sensibilidad a la humedad (MSL) / reflujo máximo
  • Estimaciones de tiempo medio entre fallas (MTBF)/fallas en el tiempo (FIT)
  • Contenido del material
  • Resumen de calificaciones
  • Monitoreo continuo de confiabilidad
Información incluida:
  • Lugar de fabricación
  • Lugar de ensamblaje

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