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UCC27517A

ACTIVO

Controlador de puerta monocanal de 4 A/4 A con UVLO de 5 V y manipulación de tensión de entrada nega

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UCC27517A

ACTIVO
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Detalles del producto

Number of channels 1 Power switch GaNFET, IGBT, MOSFET Peak output current (A) 4 Input supply voltage (min) (V) 4.5 Input supply voltage (max) (V) 18 Features Hysteretic Logic Operating temperature range (°C) -40 to 125 Rise time (ns) 9 Fall time (ns) 7 Propagation delay time (µs) 0.013 Input threshold CMOS, TTL Channel input logic Inverting, Non-Inverting Input negative voltage (V) -5 Rating Catalog Undervoltage lockout (typ) (V) 4 Driver configuration Inverting, Non-Inverting
Number of channels 1 Power switch GaNFET, IGBT, MOSFET Peak output current (A) 4 Input supply voltage (min) (V) 4.5 Input supply voltage (max) (V) 18 Features Hysteretic Logic Operating temperature range (°C) -40 to 125 Rise time (ns) 9 Fall time (ns) 7 Propagation delay time (µs) 0.013 Input threshold CMOS, TTL Channel input logic Inverting, Non-Inverting Input negative voltage (V) -5 Rating Catalog Undervoltage lockout (typ) (V) 4 Driver configuration Inverting, Non-Inverting
SOT-23 (DBV) 5 8.12 mm² 2.9 x 2.8
  • Low-Cost Gate-Driver Device Offering Superior
    Replacement of NPN and PNP Discrete Solutions
  • 4-A Peak-Source and Sink Symmetrical Drive
  • Ability to Handle Negative Voltages (–5 V) at
    Inputs
  • Fast Propagation Delays (13-ns typical)
  • Fast Rise and Fall Times (9-ns and 7-ns typical)
  • 4.5 to 18-V Single-Supply Range
  • Outputs Held Low During VDD UVLO (ensures
    glitch-free operation at power up and power down)
  • TTL and CMOS Compatible Input-Logic Threshold
    (independent of supply voltage)
  • Hysteretic-Logic Thresholds for High-Noise
    Immunity
  • Dual Input Design (choice of an inverting (IN- pin)
    or non-inverting (IN+ pin) driver configuration)
    • Unused Input Pin can be Used for Enable or
      Disable Function
  • Output Held Low when Input Pins are Floating
  • Input Pin Absolute Maximum Voltage Levels Not
    Restricted by VDD Pin Bias Supply Voltage
  • Operating Temperature Range of –40°C to
    +140°C
  • 5-Pin DBV (SOT-23) Package Option
  • Low-Cost Gate-Driver Device Offering Superior
    Replacement of NPN and PNP Discrete Solutions
  • 4-A Peak-Source and Sink Symmetrical Drive
  • Ability to Handle Negative Voltages (–5 V) at
    Inputs
  • Fast Propagation Delays (13-ns typical)
  • Fast Rise and Fall Times (9-ns and 7-ns typical)
  • 4.5 to 18-V Single-Supply Range
  • Outputs Held Low During VDD UVLO (ensures
    glitch-free operation at power up and power down)
  • TTL and CMOS Compatible Input-Logic Threshold
    (independent of supply voltage)
  • Hysteretic-Logic Thresholds for High-Noise
    Immunity
  • Dual Input Design (choice of an inverting (IN- pin)
    or non-inverting (IN+ pin) driver configuration)
    • Unused Input Pin can be Used for Enable or
      Disable Function
  • Output Held Low when Input Pins are Floating
  • Input Pin Absolute Maximum Voltage Levels Not
    Restricted by VDD Pin Bias Supply Voltage
  • Operating Temperature Range of –40°C to
    +140°C
  • 5-Pin DBV (SOT-23) Package Option

The UCC27517A single-channel, high-speed, low-side gate driver device is capable of effectively driving MOSFET and IGBT power switches. Using a design that inherently minimizes shoot-through current, the UCC27517A is capable of sourcing and sinking high peak-current pulses into capacitive loads offering rail-to-rail drive capability and extremely small propagation delay typically 13 ns.

The UCC27517A device is capable of handling –5 V at input.

The UCC27517A provides 4-A source and 4-A sink (symmetrical drive) peak-drive current capability at VDD = 12 V.

The UCC27517A is designed to operate over a wide VDD range of 4.5 V to 18 V and wide temperature range of –40°C to 140°C. Internal Undervoltage Lockout (UVLO) circuitry on VDD pin holds output low outside VDD operating range. The capability to operate at low voltage levels such as below 5 V, along with best-in-class switching characteristics, is especially suited for driving emerging wide band-gap power-switching devices such as GaN power semiconductor devices.

UCC27517A features a dual input design which offers flexibility of implementing both inverting (IN– pin) and non-inverting (IN+ pin) configurations with the same device. Either the IN+ or IN– pin can be used to control the state of the driver output. The unused input pin can be used for enable and disable function. For protection purpose, internal pullup and pulldown resistors on the input pins ensure that outputs are held low when input pins are in floating condition. Hence the unused input pin is not left floating and must be properly biased to ensure that driver output is in enabled for normal operation.

The input pin threshold of the UCC27517A device is based on TTL and CMOS compatible low-voltage logic which is fixed and independent of the VDD supply voltage. Wide hysteresis between the high and low thresholds offers excellent noise immunity.

The UCC27517A single-channel, high-speed, low-side gate driver device is capable of effectively driving MOSFET and IGBT power switches. Using a design that inherently minimizes shoot-through current, the UCC27517A is capable of sourcing and sinking high peak-current pulses into capacitive loads offering rail-to-rail drive capability and extremely small propagation delay typically 13 ns.

The UCC27517A device is capable of handling –5 V at input.

The UCC27517A provides 4-A source and 4-A sink (symmetrical drive) peak-drive current capability at VDD = 12 V.

The UCC27517A is designed to operate over a wide VDD range of 4.5 V to 18 V and wide temperature range of –40°C to 140°C. Internal Undervoltage Lockout (UVLO) circuitry on VDD pin holds output low outside VDD operating range. The capability to operate at low voltage levels such as below 5 V, along with best-in-class switching characteristics, is especially suited for driving emerging wide band-gap power-switching devices such as GaN power semiconductor devices.

UCC27517A features a dual input design which offers flexibility of implementing both inverting (IN– pin) and non-inverting (IN+ pin) configurations with the same device. Either the IN+ or IN– pin can be used to control the state of the driver output. The unused input pin can be used for enable and disable function. For protection purpose, internal pullup and pulldown resistors on the input pins ensure that outputs are held low when input pins are in floating condition. Hence the unused input pin is not left floating and must be properly biased to ensure that driver output is in enabled for normal operation.

The input pin threshold of the UCC27517A device is based on TTL and CMOS compatible low-voltage logic which is fixed and independent of the VDD supply voltage. Wide hysteresis between the high and low thresholds offers excellent noise immunity.
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Documentación técnica

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Tipo Título Fecha
* Data sheet UCC27517A Single-Channel High-Speed Low-Side Gate Driver with Negative Input Voltage Capability (with 4-A Peak Source and Sink) datasheet (Rev. C) PDF | HTML 31 ago 2015
Application note Selecting Gate Drivers for HVAC Systems (Rev. A) PDF | HTML 04 abr 2024
Application note Review of Different Power Factor Correction (PFC) Topologies' Gate Driver Needs PDF | HTML 22 ene 2024
Application note Using a Single-Output Gate-Driver for High-Side or Low-Side Drive (Rev. B) PDF | HTML 08 sep 2023
Application note Benefits of a Compact, Powerful, and Robust Low-Side Gate Driver PDF | HTML 10 nov 2021
Application brief External Gate Resistor Selection Guide (Rev. A) 28 feb 2020
Application brief Understanding Peak IOH and IOL Currents (Rev. A) 28 feb 2020
Application brief How to overcome negative voltage transients on low-side gate drivers' inputs 18 ene 2019
More literature Fundamentals of MOSFET and IGBT Gate Driver Circuits (Replaces SLUP169) (Rev. A) 29 oct 2018
Application brief Enable Function with Unused Differential Input 11 jul 2018
Application brief Low-Side Gate Drivers With UVLO Versus BJT Totem-Pole 16 mar 2018
Technical article How to achieve higher system efficiency- part two: high-speed gate drivers PDF | HTML 31 ene 2017
White paper Advancing Power Supply Solutions Through the Promise of GaN 24 feb 2015
More literature Design Review of a Full-Featured 350-W Offline Power Converter 29 oct 2013

Diseño y desarrollo

Para conocer los términos adicionales o los recursos necesarios, haga clic en cualquier título de abajo para ver la página de detalles cuando esté disponible.

Placa de evaluación

UCC57142EVM — Módulo de evaluación UCC57142

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Guía del usuario: PDF | HTML
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Modelo de simulación

UCC27517 PSpice Transient Model (Rev. B)

SLUM286B.ZIP (51 KB) - PSpice Model
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Modelo de simulación

UCC27517 TINA-TI Transient Reference Design

SLUM317.TSC (67 KB) - TINA-TI Reference Design
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Modelo de simulación

UCC27517 TINA-TI Transient Spice Model

SLUM318.ZIP (8 KB) - TINA-TI Spice Model
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Modelo de simulación

UCC27517 Unencrypted PSpice Transient Model

SLUM491.ZIP (2 KB) - PSpice Model
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Herramienta de cálculo

SLURB28 — UCC27516 and UCC27517 Schematic Review Template

This can be used to help the design engineer effectively select components and perform the layout to optimize their system for the gate driver.
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PSPICE-FOR-TI — PSpice® para herramienta de diseño y simulación de TI

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Encapsulado Pines Símbolos CAD, huellas y modelos 3D
SOT-23 (DBV) 5 Ultra Librarian
Se aplican los Términos y condiciones estándar de TI para los elementos de evaluación.

Pedidos y calidad

Información incluida:
  • RoHS
  • REACH
  • Marcado del dispositivo
  • Acabado de plomo/material de la bola
  • Clasificación de nivel de sensibilidad a la humedad (MSL) / reflujo máximo
  • Estimaciones de tiempo medio entre fallas (MTBF)/fallas en el tiempo (FIT)
  • Contenido del material
  • Resumen de calificaciones
  • Monitoreo continuo de confiabilidad
Información incluida:
  • Lugar de fabricación
  • Lugar de ensamblaje

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