ADC34RF55
- 14-Bit, quad channel 3-GSPS ADC
- Max output rate: 1.5-GSPS
- Noise spectral density:
- -156 dBFS/Hz without averaging
- -158 dBFS/Hz with 2x averaging
- Single core (non-interleaved) ADC architecture
- Aperture jitter: 50 fs
- Low close-in residual phase noise:
- -127 dBc/Hz at 10 kHz offset
- Spectral performance (f IN = 0.9 GHz, -4 dBFS):
- 2x internal averaging
- SNR: 62.3 dBFS
- SFDR HD2,3: 63 dBc
- SFDR worst spur: 85 dBFS
- Spectral performance (f IN = 1.8 GHz, -4 dBFS):
- 2x internal averaging
- SNR: 63 dBFS
- SFDR HD2,3: 68 dBc
- SFDR worst spur: 86 dBFS
- Input full scale: 1.1, 1.35 Vpp (2, 3.5 dBm)
- Code error rate (CER): 10 -15
- Full power input bandwidth (-3 dB): 2.75 GHz
- JESD204B serial data interface
- Maximum lane rate: 13 Gbps
- Supports subclass 1 deterministic latency
- Digital down-converters
- Up to two DDC per ADC channel
- Complex output: 4x to 128x decimation
- 48-bit NCO phase coherent frequency hopping
- Fast frequency hopping: < 1 µs
- Power consumption: 1.2 W/channel
- Power supplies: 1.8 V, 1.2 V
The ADC34RF55 is a single core 14-bit, 3-GSPS, quad channel analog to digital converters (ADC) that support RF sampling with input frequencies up to 3 GHz. The design maximizes signal-to-noise ratio (SNR), and delivers a noise spectral density of -156 dBFS/Hz. Using additional internal ADCs along with on-chip signal averaging, the noise density improves to -158 dBFS/Hz.
Each ADC channel can be connected to a dual-band digital down-converter (DDC) using a 48-bit NCO which supports phase coherent frequency hopping. Using the GPIO pins for NCO frequency control, frequency hopping can be achieved in less than 1 µs.
The devices supports the JESD204B serial data interface with subclass 1 deterministic latency using data rates up to 13Gbps. There are only 2 serdes lanes per ADC channel. Therefore, in bypass mode, the maximum output data rate supported is 1.5GSPS. When using faster ADC sampling rates on chip, decimation is required.
The power efficient ADC architecture consumes 1.2W/ch and provides power scaling with lower sampling rates.
技術文件
類型 | 標題 | 日期 | ||
---|---|---|---|---|
* | Data sheet | ADC34RF55 Quad Channel 14-bit 3-GSPS RF Sampling Data Converter datasheet | PDF | HTML | 2023年 11月 1日 |
Application note | Improve SFDR Using Calibration in High-Speed ADCs | PDF | HTML | 2023年 6月 19日 |
設計與開發
如需其他條款或必要資源,請按一下下方的任何標題以檢視詳細頁面 (如有)。
ADC32RF55EVM — 適用於具有低 NSD 的雙通道 14 位元 3-GSPS 射頻取樣 ADC 的 ADC32RF55 評估模組
ADC32RF55 評估模組 (EVM) 是一個展示 ADC32RF55 高速、JESD204B 介面類比轉數位轉換器 (ADC) 性能的平台。板載電壓穩壓、時鐘解決方案 (LMK04832)、變壓器耦合類比輸入及 USB 介面,可輕鬆評估 ADC32RF55。
透過現場可編程邏輯閘陣列 (FPGA) 夾層介面卡 (FMC) 連接器與 TSW14J58EVM (單獨出售) 接合,可以可使用高速數據轉換器專業軟體 (DATACONVERTERPRO-SW) 輕鬆評估及檢視 JESD204B 介面的數據擷取 (最高 1.5 GB)。
PSPICE-FOR-TI — PSpice® for TI 設計與模擬工具
封裝 | 針腳 | CAD 符號、佔位空間與 3D 模型 |
---|---|---|
VQFNP (RTD) | 64 | Ultra Librarian |
訂購與品質
- RoHS
- REACH
- 產品標記
- 鉛塗層/球物料
- MSL 等級/回焊峰值
- MTBF/FIT 估算值
- 材料內容
- 認證摘要
- 進行中持續性的可靠性監測
- 晶圓廠位置
- 組裝地點