AM620-Q1
Processor Cores:
- Up to Quad 64-bit Arm
Cortex-A53 microprocessor subsystem at up to 1.4GHz
- Quad-core Cortex-A53 cluster with 512KB L2 shared cache with SECDED ECC
- Each A53 Core has 32KB L1 DCache with SECDED ECC and 32KB L1 ICache with Parity protection
- Single-core Arm® Cortex®-M4F MCU
at up to 400MHz
- 256KB SRAM with SECDED ECC
- Dedicated Device/Power Manager
Multimedia:
- Display subsystem
- Dual display support
- 1920x1080 @ 60fps for each display
- 1x 2048x1080 + 1x 1280x720
- Up to 165MHz pixel clock support with Independent PLL for each display
- OLDI (4 lanes LVDS - 2x) and DPI (24-bit RGB LVCMOS)
- Support safety feature such as freeze frame detection and MISR data check
- 3D Graphics Processing Unit
- 1 pixel per clock or higher
- Fillrate greater than 500Mpixels/sec
- >500MTexels/s, >8GFLOPs
- Supports at least 2 composition layers
- Supports up to 2048x1080 @60fps
- Supports ARGB32, RGB565 and YUV formats
- 2D graphics capable
- OpenGL ES 3.1, Vulkan 1.2
- One Camera Serial interface
(CSI-Rx) - 4 Lane with DPHY
- MIPI CSI-2 v1.3 Compliant + MIPI D-PHY 1.2
- Support for 1,2,3 or 4 data lane mode up to 1.5Gbps per lane
- ECC verification/correction with CRC check + ECC on RAM
- Virtual Channel support (up to 16)
- Ability to write stream data directly to DDR via DMA
Memory Subsystem:
- Up to 816KB of On-chip RAM
- 64KB of On-chip RAM (OCSRAM) with SECDED ECC , Can be divided into smaller banks in increments of 32KB for as many as 2 separate memory banks
- 256KB of On-chip RAM with SECDED ECC in SMS Subsystem
- 176KB of On-chip RAM with SECDED ECC in SMS Subsystem for TI security firmware
- 256KB of On-chip RAM with SECDED ECC in Cortex-M4F MCU subsystem
- 64KB of On-chip RAM with SECDED ECC in Device/Power Manager Subsystem
- DDR Subsystem (DDRSS)
- Supports LPDDR4, DDR4 memory types
- 16-Bit data bus with inline ECC
- Supports speeds up to 1600MT/s
- Max addressable range
- 8GBytes with DDR4
- 4GBytes with LPDDR4
Functional Safety:
-
Functional Safety-Compliant targeted [Automotive]
- Developed for functional safety applications
- Documentation will be available to aid ISO 26262 functional safety system design
- Systematic capability up to ASIL D targeted
- Hardware integrity up to ASIL B targeted
- Safety-related
certification
- ISO 26262 by TUV SUD planned
- AEC - Q100 qualified
Security:
- Secure boot supported
- Hardware-enforced Root-of-Trust (RoT)
- Support to switch RoT via backup key
- Support for takeover protection, IP protection, and anti-roll back protection
- Trusted Execution Environment
(TEE) supported
- Arm TrustZone based TEE
- Extensive firewall support for isolation
- Secure watchdog/timer/IPC
- Secure storage support
- Replay Protected Memory Block (RPMB) support
- Dedicated Security Controller with user programmable HSM core and dedicated security DMA & IPC subsystem for isolated processing
- Cryptographic acceleration
supported
- Session-aware
cryptographic engine with ability to auto-switch key-material based on
incoming data stream
- Supports cryptographic cores
- AES – 128-/192-/256-Bit key sizes
- SHA2 – 224-/256-/384-/512-Bit key sizes
- DRBG with true random number generator
- PKA (Public Key Accelerator) to Assist in RSA/ECC processing for secure boot
- Session-aware
cryptographic engine with ability to auto-switch key-material based on
incoming data stream
- Debugging security
- Secure software controlled debug access
- Security aware debugging
PRU Subsystem:
- Dual-core Programmable Real-Time Unit Subystem (PRUSS) running up to 333MHz
- Intended for driving GPIO for
cycle accurate protocols such as additional:
- General Purpose Input/Output (GPIO)
- UARTs
- I2C
- External ADC
- 16KByte program memory per PRU with SECDED ECC
- 8KB data memory per PRU with SECDED ECC
- 32KB general purpose memory with SECDED ECC
- CRC32/16 HW accelerator
- Scratch PAD memory with 3 banks of 30 x 32-bit registers
- 1 Industrial 64-bit timer with 9 capture and 16 compare events, along with slow and fast compensation
- 1 interrupt controller (INTC), minimum of 64 input events supported
High-Speed Interfaces:
- Integrated Ethernet switch
supporting (total 2 external ports)
- RMII(10/100) or RGMII (10/100/1000)
- IEEE1588 (Annex D, Annex E, Annex F with 802.1AS PTP)
- Clause 45 MDIO PHY management
- Packet Classifier based on ALE engine with 512 classifiers
- Priority based flow control
- Time sensitive networking (TSN) support
- Four CPU H/W interrupt Pacing
- IP/UDP/TCP checksum offload in hardware
- Two USB2.0 Ports
- Port configurable as USB host, USB peripheral, or USB Dual-Role Device (DRD mode)
- Integrated USB VBUS detection
General Connectivity:
- 9x Universal Asynchronous Receiver-Transmitters (UART)
- 5x Serial Peripheral Interface (SPI) controllers
- 6x Inter-Integrated Circuit (I2C) ports
- 3x Multichannel Audio Serial
Ports (McASP)
- Transmit and Receive Clocks up to 50MHz
- Up to 4/6/16 Serial Data Pins across 3x McASP with Independent TX and RX Clocks
- Supports Time Division Multiplexing (TDM), Inter-IC Sound (I2S), and Similar Formats
- Supports Digital Audio Interface Transmission (SPDIF, IEC60958-1, and AES-3 Formats)
- FIFO Buffers for Transmit and Receive (256 Bytes)
- Support for audio reference output clock
- 3x enhanced PWM modules (ePWM)
- 3x enhanced Quadrature Encoder Pulse modules (eQEP)
- 3x enhanced Capture modules (eCAP)
- General-Purpose I/O (GPIO), All LVCMOS I/O can be configured as GPIO
- 3x Controller Area Network (CAN)
modules with CAN-FD support
- Conforms w/ CAN Protocol 2.0 A, B and ISO 11898-1
- Full CAN FD support (up to 64 data bytes)
- Parity/ECC check for Message RAM
- Speed up to 8Mbps
Media and Data Storage:
- 3x Multi-Media Card/Secure Digital (MMC/SD/SDIO) interface
- 1x 8-bit eMMC interface up to HS200 speed
- 2x 4-bit SD/SDIO interface up to UHS-I
- Compliant with eMMC 5.1, SD 3.0 and SDIO Version 3.0
- 1× General-Purpose Memory
Controller (GPMC) up to 133MHz
- Flexible 8- and 16-Bit Asynchronous Memory Interface With up to four Chip (22-bit address) Selects (NAND, NOR, Muxed-NOR, and SRAM)
- Uses BCH Code to Support 4-, 8-, or 16-Bit ECC
- Uses Hamming Code to Support 1-Bit ECC
- Error Locator Module
(ELM)
- Used With the GPMC to Locate Addresses of Data Errors From Syndrome Polynomials Generated Using a BCH Algorithm
- Supports 4-, 8-, and 16-Bit Per 512-Byte Block Error Location Based on BCH Algorithms
- OSPI/QSPI with DDR / SDR
support
- Support for Serial NAND and Serial NOR flash devices
- 4GBytes memory address support
- XIP mode with optional on-the-fly encryption
Power Management:
- Low power modes supported by
Device/Power Manager
- Partial IO support for CAN/GPIO/UART wakeup
- DeepSleep
- MCU Only
- Standby
- Dynamic frequency scaling for Cortex-A53
Optimal Power Management Solution:
- Recommended TPS65219
Power Management ICs (PMIC)
- Companion PMIC specially designed to meet device power supply requirements
- Flexible mapping and factory programmed configurations to support different use cases
Boot Options:
- UART
- I2C EEPROM
- OSPI/QSPI Flash
- GPMC NOR/NAND Flash
- Serial NAND Flash
- SD Card
- eMMC
- USB (host) boot from Mass Storage device
- USB (device) boot from external host (DFU mode)
- Ethernet
Technology / Package:
- 16nm technology
- 13mm x 13mm, 0.5mm pitch, 425-pin FCCSP BGA (ALW)
- 17.2mm x 17.2mm, 0.8mm pitch, 441-pin FCBGA (AMC)
The low-cost AM62x Sitara™ MPU family of application processors are built for Linux® application development. With scalable Arm® Cortex®-A53 performance and embedded features, such as dual-display support and 3D graphics acceleration, along with an extensive set of peripherals, making the AM62x device well-suited for a broad range of industrial and automotive applications while offering intelligent features and optimized power architecture.
Functional safety requirements can be addressed using the integrated Cortex-M4F cores and dedicated peripherals, which can all be isolated from the rest of the AM62x processor.
The 3-port Gigabit Ethernet switch has one internal port and two external ports with Time-Sensitive Networking (TSN) capable. An additional PRU module on the device enables real-time I/O capability for customer’s own use cases. In addition, the extensive set of peripherals included in AM62x enable system-level connectivity, such as USB, MMC/SD, Camera interface, OSPI, CAN-FD and GPMC for parallel host interface to an external ASIC/FPGA. The AM62x device also supports secure boot for IP protection with the built-in Hardware Security Module (HSM) and employs advanced power management support for portable and power-sensitive applications.
Products in the AM62x processor family:
- AM625 – Human-machine Interaction SoC with Arm® Cortex®-A53-based edge AI and full-HD dual-display
- AM625-Q1 – Automotive Display SoC with embedded safety for digital clusters
- AM623 – Internet of Things (IoT) and Gateway SoC with Arm® Cortex®-A53-based object and gesture recognition
- AM620-Q1 – Automotive Compute SoC with embedded safety for driver monitoring, networking and V2X systems
技術文件
設計與開發
電源供應解決方案
為 AM620-Q1 尋找可用的電源供應解決方案。TI 提供適用於 TI 與非 TI 之系統單晶片 (SoC)、處理器、微控制器、感測器或現場可編程邏輯閘陣列 (FPGA) 的電源供應解決方案。
SK-AM62-LP — 適用低功耗 Sitara™ 處理器的 AM62x 入門套件
SK-AM62-LP 是數量有限的入門套件 (SK) 評估模組 (EVM)。
低功耗 AM62x 入門套件 (SK) 評估模組 (EVM) 是以 AM62x 系統單晶片 (SoC) 為建置基礎的獨立測試和開發平台。AM62x 處理器包含四核心 64 位元 ARM®-Cortex®-A53 微處理器、單核心 ARM Cortex-R5F 微控制器 (MCU) 與 ARM Cortex-M4F MCU。
SK-AM62-LP 讓使用者能夠透過高畫質多媒體介面 (HDMI) [透過每吋點數 (DPI)] 和解析度最高 2K 的低電壓差動訊號 (LVDS)，以及使用序列、乙太網路、USB (...)
TMDSEMU110-U — XDS110 JTAG 偵錯探測器
德州儀器 XDS110 是一種全新的偵錯探測器 (模擬器) 類別，適用於 TI 嵌入式處理器。XDS110 取代 XDS100 系列，可在單一 Pod 中支援更廣泛的標準 (IEEE1149.1、IEEE1149.7、SWD)。同時，所有 XDS 偵錯探針在所有配備嵌入式追蹤緩衝器 (ETB) 的 Arm® 與 DSP 處理器中均支援核心與系統追蹤。 對於針腳上的核心追蹤，則需要 XDS560v2 PRO TRACE。
德州儀器 XDS110 透過 TI 20 針腳連接器（具有用於 TI 14 針腳和 Arm 10 針腳和 Arm 20 針腳的多轉接器）連接到目標電路板，並透過 USB2.0 (...)
TMDSEMU200-U — XDS200 USB 偵錯探測器
XDS200 是為 TI 嵌入式裝置偵錯的偵錯探測器（模擬器）。對於大多數裝置，建議使用較新、成本較低的 XDS110 (www.ti.com/tool/TMDSEMU110-U)。XDS200 支援單一 Pod 中廣泛的標準（IEEE1149.1、IEEE1149.7、SWD）。所有 XDS 偵錯探針在所有配備嵌入式追蹤緩衝器 (ETB) 的 Arm® 與 DSP 處理器中均支援核心與系統追蹤。
XDS200 透過 TI 20 接腳連接器（配備適用 TI 14 接腳、Arm Cortex® 10 接腳和 Arm 20 接腳的多重轉接器）連接到目標電路板，並透過 USB2.0 高速 (...)
TMDSEMU560V2STM-UE — XDS560v2 System Trace USB 與乙太網路偵錯探測器
The XDS560v2 is the highest performance of the XDS560™ family of debug probes and supports both the traditional JTAG standard (IEEE1149.1) and cJTAG (IEEE1149.7). Note that it does not support serial wire debug (SWD).
All XDS debug probes support Core and System Trace in all ARM and DSP processors (...)
LB-3P-TRACE32-ARM — 適用於 Arm® 架構微控制器和處理器的 Lauterbach TRACE32® 偵錯和追蹤系統
Lauterbach 的 TRACE32® 工具是一套先進的軟硬體元件，可讓開發人員分析、最佳化及認證各種 Arm® 架構微控制器和處理器。全球知名的嵌入式系統和 SoC 偵錯和追蹤解決方案是完美的解決方案，適用於從早期的矽前 (pre-silicon) 開發，到產品認證和現場故障排除等所有開發階段。Lauterbach 工具的直覺模組化設計為工程師提供現今最高的可用性能，以及可隨需求變化而調整和成長的系統。藉由 TRACE32® 偵錯器，開發人員也可透過單一偵錯介面，同時偵錯和控制 SoC 中的任何 C28x/C29x/C6x/C7x DSP 核心及所有其他 Arm (...)
TSK-3P-BLUEBOX — TASKING BlueBox hardware debugger
TASKING’s Debug, Trace, and Test tools offer comprehensive solutions for efficient debugging, tracing, and testing of TI's embedded systems. The scalable TASKING BlueBox debuggers allow users to easily flash, debug, and test across TI's portfolio. Development on TI hardware is made even easier with (...)
MCU-PLUS-SDK-AM62X — MCU+ SDK for AM62x – RTOS, No-RTOS
AM62 處理器 Linux® 軟體開發套件 (SDK) 是用於嵌入式處理器的統合軟體平台，可提供簡易設定，以及可迅速立即利用的基準測試與示範。
此 SDK 的所有版本在 TI 為其提供的廣泛產品組合中都是一致的，開發人員能順暢地在其他產品上重複使用軟體，並開發軟體。
PROCESSOR-SDK-ANDROID-AM62X — Processor SDK Android for AM62x
AM62 處理器 Linux® 軟體開發套件 (SDK) 是用於嵌入式處理器的統合軟體平台，可提供簡易設定，以及可迅速立即利用的基準測試與示範。
此 SDK 的所有版本在 TI 為其提供的廣泛產品組合中都是一致的，開發人員能順暢地在其他產品上重複使用軟體，並開發軟體。
PROCESSOR-SDK-LINUX-AM62X — Processor SDK Linux for AM62x
AM62 處理器 Linux® 軟體開發套件 (SDK) 是用於嵌入式處理器的統合軟體平台，可提供簡易設定，以及可迅速立即利用的基準測試與示範。
此 SDK 的所有版本在 TI 為其提供的廣泛產品組合中都是一致的，開發人員能順暢地在其他產品上重複使用軟體，並開發軟體。
PROCESSOR-SDK-LINUX-RT-AM62X — Processor SDK RT-Linux for AM62x
AM62 處理器 Linux® 軟體開發套件 (SDK) 是用於嵌入式處理器的統合軟體平台，可提供簡易設定，以及可迅速立即利用的基準測試與示範。
此 SDK 的所有版本在 TI 為其提供的廣泛產品組合中都是一致的，開發人員能順暢地在其他產品上重複使用軟體，並開發軟體。
CCSTUDIO — Code Composer Studio™ integrated development environment (IDE)
CCStudio™ IDE is part of TI's extensive CCStudio™ development ecosystem and is an integrated development environment for TI's microcontrollers, processors, wireless connectivity devices, and radar sensors. CCStudio IDE is available as desktop or cloud-based applications. The cloud version (...)
CLOCKTREE-AM62X — Clock tree configuration for AM62x
DDR-CONFIG-AM62 — DDR Configuration Tool
K3-RESOURCE-CONFIGURATION — Resource partitioning tool for multi core SOCs
SYSCONFIG — Standalone desktop version of SysConfig
CCStudio™ SysConfig is part of TI's extensive CCStudio™ development ecosystem and is a configuration tool that simplifies hardware and software configuration challenges to accelerate software development.
SysConfig provides an intuitive graphical user interface for configuring pins, peripherals, (...)
TSK-3P-VX-TOOLSET — 適用於 Arm 的 TASKING VX 工具套件
適用於 Arm 的 VX 工具套件是一套經過認證的編譯器工具鏈，可用於指定 Cortex-M 與 Cortex-R 核心裝置的安全關鍵嵌入式軟體開發。透過整合 Eclipse IDE、進階多核心支援，以及與 TASKING BlueBox 除錯器的相容性，VX 工具套件可簡化開發流程。通過 TÜV NORD 認證，符合 ISO 26262（最高支援 ASIL D）及 ISO 21434 標準。
AM62-ACADEMY — AM62x Academy
TI-DEVELOPER-ZONE — Start embedded development on your desktop or in the cloud
GHS-INTEGRITY-RTOS — Green Hills INTEGRITY RTOS
GHS-3P-UVELOSITY — Green Hills Software u-velOSity Safety RTOS
The µ-velOSity™ Safety RTOS is the smallest of Green Hills Software's real-time operating systems and was designed especially for microcontrollers. It supports a wide range of TI processor families using the Arm® Cortex-M or Cortex-R cores as a main CPU or as a co-processors (...)
WHIS-3P-SAFERTOS — WITTENSTEIN SAFERTOS 預先認證的安全 RTOS
SAFERTOS® 是專為嵌入式處理器設計的獨特即時作業系統。經 TÜV SÜD 預先認證，符合 IEC 61508 SIL3 與 ISO 26262 ASILD 標準。SAFERTOS® 是由 WHIS 專家團隊專為安全而打造，適用於全球重要安全應用。WHIS 與德州儀器的合作已經超過十年。在此期間，WHIS 已將 SAFERTOS® 移植至各種 TI 處理器，支援所有熱門核心，並可依要求提供其他架構。SAFERTOS® 專為您的特定處理器/編譯器組合量身打造，隨附完整的原始程式碼與設計保證包，可完全一目了然整個設計生命週期。許多 WHIS 客戶開始使用 FreeRTOS (...)
AM62X-RESTRICTED-DOCS-SAFETY — AM62X safety content
EB-3P-TRESOS — Elektrobit EB tresos Classis AUTOSAR 軟體
Elektrobit 在基本軟體領域擁有數十年經驗，其 EB tresos 產品線和自訂 Classic AUTOSAR 解決方案，可提供最先進的軟體，協助滿足各個汽車製造商的特定需求。Elektrobit 可對每個專案提供符合汽車 AUTOSAR 需求的適當解決方案，從符合 OSEK/VDX 規範的基本軟體，到以 Classic AUTOSAR 為基礎的多核心與功能安全系統，都包含在內。
DDR-MARGIN-FW — Firmware and scripts to measure system DDR margin
ALTIA-3P-GUI — 適用於 AM62x Sitara™ 處理器的 Altia® GUI 開發軟體
Altia 擅長建造嵌入式顯示器的圖形使用者介面 (GUI) 開發軟體和服務。Altia 的設計涵蓋全球超過 1 億部裝置，供汽車、醫療、消費電子及工業裝置產業的各家公司用於將一流的 GUI 投入生產。Altia 產品和服務支援各種 TI Sitara™ 和 Jacinto™ 處理器。
Altia 工具鏈包括整合、高效且易於使用的工作流程，具有先進 3D 功能、全球語言支援及其他更多功能。Altia 工程服務團隊在 GUI 開發生命週期中提供全球支援，從圖形開發和使用者體驗研究到測試、功能安全認證及生產。
MCW-3P-FACEREC — 適用於臉部辨識、驗證及人類行為分析的 MulticoreWare 軟體
MulticoreWare is a software engineering product and services company that combines its expertise in artificial intelligence and embedded systems to create Linux-based solutions to solve real world challenges in imaging, building automation, retail, authentication, smart city and a variety of (...)
VCTR-3P-MICROSAR — 適用於微控制器和高性能電腦 (HPC) 的 Vector MICROSAR AUTOSAR 軟體
MICROSAR 與 DaVinci 產品系列透過適用於微控制器與 HPC 的精密嵌入式軟體和強大開發工具，簡化 ECU 開發。有了先進的基礎架構軟體，您即可為 ECU 建立最佳基礎，並利用相關工具簡化所有相關開發作業。MICROSAR 嵌入式軟體是根據 AUTOSAR 經典和適應性等相關標準所開發。軟體也適合符合最高 ASIL D 之 ISO 26262 標準的安全相關應用。此外，智慧網路安全功能可保護控制單元免受未經授權的存取和竄改。Vector 涵蓋所有汽車與其他工業應用的使用案例。對於配備高性能電腦的軟體定義車輛 (SDV)，其可提供現代車輛作業系統，以做為開放式模組化軟體生態系統。
AM62X-PET-CALC — AM62x Power Estimation Tool
AM62x 功率預估工具 (PET) 試算表允許使用者根據測量和模擬數據計算功耗估計值。估計值按原樣提供，不保證在指定精密度內。功耗取決於在運作過程中執行於處理器的電氣參數、矽製程變化、環境條件和使用案例。
實際功耗應該在實際系統中驗證。此工具用於估計實際運作模式下的功耗，不適用於按尺寸供電。
對於試算表的輸入部分，使用者必須使用對應的使用參數修改欄位。專為使用者輸入設計的儲存格為藍色。無法修改的欄位爲紅色。綠色欄位爲輸出。
此功率預估試算表可能會有所變動。
TIPA-050038 — 適用於汽車應用的 AM62x-Q1 電源供應設計
這款適用於 AM62x-Q1 處理器的電源供應設計專為低成本、小尺寸且非安全車用電源設計所設計。TPS65219-Q1 PMIC 是成本與空間最佳化的設計，專為對 AM62x 處理器及其主要週邊設備供電所開發。TPS65219-Q1 提供多項原廠編程的可訂購零件編號，可支援不同的 AM62x-Q1 使用案例。
| 封裝 | 針腳 | CAD 符號、佔位空間與 3D 模型 |
|---|---|---|
| FCBGA (AMC) | 441 | Ultra Librarian |
| FCCSP (ALW) | 425 | Ultra Librarian |
訂購與品質
建議產品可能具有與此 TI 產品相關的參數、評估模組或參考設計。