LM2105
- Drives two N-channel MOSFETs in half-bridge configuration
- Integrated bootstrap diode
- 5-V typical undervoltage lockout on GVDD
- 107-V absolute maximum voltage on BST
- –19.5-V absolute maximum negative transient voltage handling on SH
- 0.5-A/0.8-A peak source/sink currents
- 115-ns typical propagation delay
The LM2105 is a compact, high-voltage gate driver designed to drive both the high-side and the low-side N-channel MOSFETs in a synchronous buck or a half-bridge configuration. The integrated bootstrap diode saves board space and reduces system cost by eliminating the need for an external discrete diode.
The –1-V DC and –19.5-V transient negative voltage handling on the SH pin improve the system robustness in high noise applications. The small, thermally-enhanced 8-pin WSON package improves PCB layout by allowing the driver to be placed closer to the motor phases. The LM2105 is also available in an 8-pin SOIC package compatible with industry standard pinouts. Undervoltage lockout (UVLO) is provided on both the low-side and the high-side power rails for protection during power up and power down.
技術文件
類型 | 標題 | 日期 | ||
---|---|---|---|---|
* | Data sheet | LM2105 107-V, 0.5-A, 0.8-A Half-Bridge Driver with 5-V UVLO and Integrated Bootstrap Diode datasheet (Rev. C) | PDF | HTML | 2023年 9月 9日 |
Application note | How to Choose a Gate Driver for DC Motor Drives | PDF | HTML | 2023年 10月 5日 | |
EVM User's guide | LM2105EVM User's Guide | PDF | HTML | 2023年 2月 14日 | |
Certificate | LM2105EVM EU RoHS Declaration of Conformity (DoC) | 2023年 2月 1日 |
設計與開發
如需其他條款或必要資源,請按一下下方的任何標題以檢視詳細頁面 (如有)。
PSPICE-FOR-TI — PSpice® for TI 設計與模擬工具
封裝 | 針腳 | CAD 符號、佔位空間與 3D 模型 |
---|---|---|
SOIC (D) | 8 | Ultra Librarian |
WSON (DSG) | 8 | Ultra Librarian |
訂購與品質
- RoHS
- REACH
- 產品標記
- 鉛塗層/球物料
- MSL 等級/回焊峰值
- MTBF/FIT 估算值
- 材料內容
- 認證摘要
- 進行中持續性的可靠性監測
- 晶圓廠位置
- 組裝地點
建議產品可能具有與此 TI 產品相關的參數、評估模組或參考設計。