LP8769-Q1
- AEC-Q100 Qualified with the
following results:
- Input voltage: 2.8 V to 5.5 V
- Device temperature grade 1: –40°C to +125°C ambient operating temperature range
- Device HBM ESD classification Level 2
- Device CDM ESD classification Level C4B
- Functional Safety-Compliant
- Developed for functional safety applications
- Documentation available to aid ISO 26262 system design up to ASIL-D
- Documentation available to aid IEC 61508 system design up to SIL-3
- Systematic capability up to ASIL-D
- Hardware integrity up to ASIL-D
- Windowed voltage and over-current monitors
- Watchdog with selectable trigger / Q&A mode
- Level or PWM error signal monitoring (ESM)
- Thermal monitoring with high temperature warning and thermal shutdown
- Bit-integrity (CRC) error detection on configuration registers and non-volatile memory
- 4 high-efficiency step-down DC/DC
converters:
- Output voltage: 0.3 V to 3.34 V (0.3 V to 1.9 V for multi-phase outputs)
- Maximum output current: 5 A per phase, up to 20 A with 4-phase configuration
- Programmable output voltage slew-rate: 0.5 mV/µs to 33 mV/µs
- Switching frequency: 2.2 MHz or 4.4 MHz
- 10 configurable general purpose I/O (GPIO)
- SPMI interface for multi-PMIC synchronization
- Input overvoltage monitor (OVP) and undervoltage lockout (UVLO)
.
.
The LP8769x-Q1 device is designed to meet the power management requirements of the latest processors and platforms in various safety-relevant automotive and industrial applications. The device has four step-down DC/DC converter cores, that are configurable for five different phase configurations from one 4-phase output to four 1-phase outputs. The device settings can be changed by I2C-compatible serial interface or by a SPI serial interface.
The automatic PFM/PWM (AUTO mode) operation together with the automatic phase adding and phase shedding maximizes efficiency over a wide output-current range. The LP8769x-Q1 device supports remote differential voltage sensing for multiphase outputs to compensate IR drop between the regulator output and the point-of-load (POL) that improves the accuracy of the output voltage. The switching clock can be forced to PWM mode and the phases are interleaved. The switching can be synchronized to an external clock and spread-spectrum mode can be enabled to minimize the disturbances.
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技術文件
| 重要文件 | 類型 | 標題 | 格式選項 | 下載最新的英文版本 | 日期 | |
|---|---|---|---|---|---|---|
| * | 資料表 | LP8769-Q1 High Frequency Quad Step-Down DC-DC datasheet | PDF | HTML | 2022/12/14 |
設計與開發
電源供應解決方案
探索包括 LP8769-Q1 的解決方案。TI 提供適用於 TI 與非 TI 之系統單晶片 (SoC)、處理器、微控制器、感測器或現場可編程邏輯閘陣列 (FPGA) 的電源供應解決方案。
LP87694Q1EVM — LP8769x-Q1 評估模組
PMP23227 — 適用於 AMD Versal™ Edge AI 系列的電力傳輸參考設計
此參考設計展示了 VE2302 裝置所需的電源軌如何由 TI 的穩壓器 IC 供電。AMD 的最小供應器電源軌電力整合。請參見 AMD 的 Power Design Manager (PDM) 工具,以了解所有可用的電源整合選項。在預估任何應用的功率時,請使用 PDM。此參考設計使用範例功率估計。設計 AI Edge 系列其他裝置的電源樹狀架構時,也可使用此設計作為基礎。此系統的原始電源通常介於 8VIN 至 18VIN 之間,並可提供約 50W 的功率。
| 封裝 | 針腳 | CAD 符號、佔位空間與 3D 模型 |
|---|---|---|
| VQFN-HR (RQK) | 32 | Ultra Librarian |
訂購與品質
建議產品可能具有與此 TI 產品相關的參數、評估模組或參考設計。