LP8769-Q1
- AEC-Q100 Qualified with the following results:
- Input voltage: 2.8 V to 5.5 V
- Device temperature grade 1: –40°C to +125°C ambient operating temperature range
- Device HBM ESD classification Level 2
- Device CDM ESD classification Level C4B
- Functional Safety-Compliant
- Developed for functional safety applications
- Documentation available to aid ISO 26262 system design up to ASIL-D
- Documentation available to aid IEC 61508 system design up to SIL-3
- Systematic capability up to ASIL-D
- Hardware integrity up to ASIL-D
- Windowed voltage and over-current monitors
- Watchdog with selectable trigger / Q&A mode
- Level or PWM error signal monitoring (ESM)
- Thermal monitoring with high temperature warning and thermal shutdown
- Bit-integrity (CRC) error detection on configuration registers and non-volatile memory
- 4 high-efficiency step-down DC/DC converters:
- Output voltage: 0.3 V to 3.34 V (0.3 V to 1.9 V for multi-phase outputs)
- Maximum output current: 5 A per phase, up to 20 A with 4-phase configuration
- Programmable output voltage slew-rate: 0.5 mV/µs to 33 mV/µs
- Switching frequency: 2.2 MHz or 4.4 MHz
- 10 configurable general purpose I/O (GPIO)
- SPMI interface for multi-PMIC synchronization
- Input overvoltage monitor (OVP) and undervoltage lockout (UVLO)
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The LP8769x-Q1 device is designed to meet the power management requirements of the latest processors and platforms in various safety-relevant automotive and industrial applications. The device has four step-down DC/DC converter cores, that are configurable for five different phase configurations from one 4-phase output to four 1-phase outputs. The device settings can be changed by I2C-compatible serial interface or by a SPI serial interface.
The automatic PFM/PWM (AUTO mode) operation together with the automatic phase adding and phase shedding maximizes efficiency over a wide output-current range. The LP8769x-Q1 device supports remote differential voltage sensing for multiphase outputs to compensate IR drop between the regulator output and the point-of-load (POL) that improves the accuracy of the output voltage. The switching clock can be forced to PWM mode and the phases are interleaved. The switching can be synchronized to an external clock and spread-spectrum mode can be enabled to minimize the disturbances.
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技術文件
| 類型 | 標題 | 日期 | ||
|---|---|---|---|---|
| * | Data sheet | LP8769-Q1 High Frequency Quad Step-Down DC-DC datasheet | PDF | HTML | 2022年 12月 14日 |
設計與開發
電源供應解決方案
探索包括 LP8769-Q1 的解決方案。TI 提供適用於 TI 與非 TI 之系統單晶片 (SoC)、處理器、微控制器、感測器或現場可編程邏輯閘陣列 (FPGA) 的電源供應解決方案。
LP87694Q1EVM — LP8769x-Q1 評估模組
| 封裝 | 針腳 | CAD 符號、佔位空間與 3D 模型 |
|---|---|---|
| VQFN-HR (RQK) | 32 | Ultra Librarian |
訂購與品質
- RoHS
- REACH
- 產品標記
- 鉛塗層/球物料
- MSL 等級/回焊峰值
- MTBF/FIT 估算值
- 材料內容
- 認證摘要
- 進行中持續性的可靠性監測
- 晶圓廠位置
- 組裝地點
建議產品可能具有與此 TI 產品相關的參數、評估模組或參考設計。