TPS53622

現行

具有 NVM 和 PMBus 的 VR13 雙通道 D-CAP+™ 2+0/1+1 降壓控制器

產品詳細資料

Vin (min) (V) 4.5 Vin (max) (V) 17 Iout (max) (A) 80 Operating temperature range (°C) -40 to 125 Control mode D-CAP+ Topology Multiphase Rating Catalog Vout (min) (V) 0.25 Vout (max) (V) 2.8125 Iq (typ) (A) 0.013 Duty cycle (max) (%) 50
Vin (min) (V) 4.5 Vin (max) (V) 17 Iout (max) (A) 80 Operating temperature range (°C) -40 to 125 Control mode D-CAP+ Topology Multiphase Rating Catalog Vout (min) (V) 0.25 Vout (max) (V) 2.8125 Iq (typ) (A) 0.013 Duty cycle (max) (%) 50
WQFN (RSB) 40 25 mm² 5 x 5
  • Intel VR13 Serial VID (SVID) Compliant
  • Full VR13 Server Feature Set Including Digital Input Power Monitor
  • Programmable Loop Compensations
  • Configurable with Non-Volatile Memory (NVM) for Low External Component Counts
  • Individual Phase Current Calibrations and Reports
  • Dynamic Phase Shedding with Programmable Current Threshold for Optimizing Efficiency at Light and Heavy Loads
  • Fast Phase-Adding for Undershoot Reduction (USR)
  • Backward VR12.0 and VR12.5 Compatible
  • 8-Bit DAC with Selectable 5 mV or 10 mV Resolution and Output Ranges from 0.25 V to 1.52 V or 0.5 to 2.8125 V for Dual Channels
  • Driverless Configuration for Efficient High-Frequency Switching
  • Fully Compatible with TI NextFET™ Power Stage for High-Density Solutions
  • Accurate, Adjustable Voltage Positioning
  • Patented AutoBalance™ Phase Balancing
  • Selectable, 16-level Per-Phase Current Limit
  • PMBus™ System Interface for Telemetry of Voltage, Current, Power, Temperature, and Fault Conditions
  • Dynamic Output Voltage Transitions with Programmable Slew Rates via SVID or PMBus Interface
  • Conversion Voltage Range: 4.5 V to 17 V
  • Low Quiescent Current
  • Intel VR13 Serial VID (SVID) Compliant
  • Full VR13 Server Feature Set Including Digital Input Power Monitor
  • Programmable Loop Compensations
  • Configurable with Non-Volatile Memory (NVM) for Low External Component Counts
  • Individual Phase Current Calibrations and Reports
  • Dynamic Phase Shedding with Programmable Current Threshold for Optimizing Efficiency at Light and Heavy Loads
  • Fast Phase-Adding for Undershoot Reduction (USR)
  • Backward VR12.0 and VR12.5 Compatible
  • 8-Bit DAC with Selectable 5 mV or 10 mV Resolution and Output Ranges from 0.25 V to 1.52 V or 0.5 to 2.8125 V for Dual Channels
  • Driverless Configuration for Efficient High-Frequency Switching
  • Fully Compatible with TI NextFET™ Power Stage for High-Density Solutions
  • Accurate, Adjustable Voltage Positioning
  • Patented AutoBalance™ Phase Balancing
  • Selectable, 16-level Per-Phase Current Limit
  • PMBus™ System Interface for Telemetry of Voltage, Current, Power, Temperature, and Fault Conditions
  • Dynamic Output Voltage Transitions with Programmable Slew Rates via SVID or PMBus Interface
  • Conversion Voltage Range: 4.5 V to 17 V
  • Low Quiescent Current

The TPS53622 is a fully VR13 SVID compliant step-down controller with dual channels, built-in non-volatile memory (NVM), and PMBus™ interface, and is fully compatible with TI NexFET ™power stage. Advanced control features such as D-CAP+™ architecture with undershoot reduction (USR) provide fast transient response, low output capacitance, and good current sharing. The device also provides novel phase interleaving strategy and dynamic phase shedding for efficiency improvement at different loads. Adjustable control of VCORE slew rate and voltage positioning round out the Intel® VR13™ features. In addition, the device supports the PMBus communication interface for reporting the telemetry of voltage, current, power, temperature, and fault conditions to the systems. All programmable parameters can be configured by the PMBus interface and can be stored in NVM as the new default values to minimize the external component count.

The TPS53622 device if offered in a thermally enhanced -pin QFN packaged and is rated to operate from –40°C to 125°C.

The TPS53622 is a fully VR13 SVID compliant step-down controller with dual channels, built-in non-volatile memory (NVM), and PMBus™ interface, and is fully compatible with TI NexFET ™power stage. Advanced control features such as D-CAP+™ architecture with undershoot reduction (USR) provide fast transient response, low output capacitance, and good current sharing. The device also provides novel phase interleaving strategy and dynamic phase shedding for efficiency improvement at different loads. Adjustable control of VCORE slew rate and voltage positioning round out the Intel® VR13™ features. In addition, the device supports the PMBus communication interface for reporting the telemetry of voltage, current, power, temperature, and fault conditions to the systems. All programmable parameters can be configured by the PMBus interface and can be stored in NVM as the new default values to minimize the external component count.

The TPS53622 device if offered in a thermally enhanced -pin QFN packaged and is rated to operate from –40°C to 125°C.

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類型 標題 日期
* Data sheet TPS53622 Dual-Channel (1-Phase + 1-Phase) or (2-Phase + 0-Phase) D-CAP+™ Step-Down Multiphase Controller with NVM and PMBus™ for VR13 Server VCCIO + VMCP datasheet PDF | HTML 2017年 8月 7日
Application note Multiphase Buck Design from Start to Finish, Part 1 (Rev. B) 2021年 4月 7日
Application note D-CAP+TM Control for Multiphase Step-Down Voltage Regulators for Powering Microp 2019年 1月 13日
Application note NVM Programming for VR13 Power Controllers PDF | HTML 2018年 5月 4日
Technical article The D-CAP+™ Modulator: Evaluating the small-signal robustness PDF | HTML 2017年 11月 15日
User guide Using the Fusion Digital Power Designer for TPS536xx VR13 Multiphase Solutions 2016年 12月 16日

設計與開發

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應用軟體及架構

FUSION_DIGITAL_POWER_DESIGNER — 數位電源軟體

Fusion Digital Power™ graphical user interface (GUI) software is used to configure and monitor select Texas Instruments digital power controllers and sequencer/health monitors. The application uses the PMBus protocol to communicate with the device over serial bus by way of a TI USB adapter.
參考設計

PMP21872 — 外型精巧 12-Vin、1-Vout 40-A 雙相同步降壓參考設計

This reference design is a dual-phase synchronous buck solution using TPS53622 controller with two CSD95490Q5MC power-stage ICs. It takes a 12-V input and converts it to 1-V out at 40 A; 20 A per phase.
Test report: PDF
電路圖: PDF
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