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TPSM82912

現行

具有整合式鐵氧體磁珠濾波器補償的 17-V、2-A 低雜訊和低漣波降壓模組

產品詳細資料

Rating Catalog Topology Buck, Synchronous Buck Iout (max) (A) 2 Vin (max) (V) 17 Vin (min) (V) 3 Vout (max) (V) 5.5 Vout (min) (V) 0.8 Features Enable, Frequency synchronization, Low Noise, Output discharge, Overcurrent protection, Power good, Remote Sense, Spread Spectrum Operating temperature range (°C) -40 to 125 Type Module Duty cycle (max) (%) 100 Control mode current mode Switching frequency (min) (kHz) 1000 Switching frequency (max) (kHz) 2200
Rating Catalog Topology Buck, Synchronous Buck Iout (max) (A) 2 Vin (max) (V) 17 Vin (min) (V) 3 Vout (max) (V) 5.5 Vout (min) (V) 0.8 Features Enable, Frequency synchronization, Low Noise, Output discharge, Overcurrent protection, Power good, Remote Sense, Spread Spectrum Operating temperature range (°C) -40 to 125 Type Module Duty cycle (max) (%) 100 Control mode current mode Switching frequency (min) (kHz) 1000 Switching frequency (max) (kHz) 2200
B0QFN (RDU) 28 24.75 mm² 5.5 x 4.5
  • Low output noise < 20 µVRMS(100 Hz to 100 kHz)
  • Low output voltage ripple < 10 µVRMS after ferrite bead
  • High PSRR of > 65 dB (up to 100 kHz)
  • 2.2-MHz or 1-MHz fixed frequency peak current mode control
  • Synchronizable with external clock (optional)
  • Integrated loop compensation supports ferrite bead for second stage L-C filter with 30-dB attenuation (optional)
  • Spread spectrum modulation (optional)
  • 3.0-V to 17-V input voltage range
  • 0.8-V to 5.5-V output voltage range
  • 57-mΩ/20-mΩ RDSon
  • Output voltage accuracy of ±1%
  • Precise enable input allows
    • User-defined undervoltage lockout
    • Exact sequencing
  • Adjustable soft start
  • Power-good output
  • Output discharge (optional)
  • –40°C to 125°C junction temperature range
    • –55°C to 125°C for -ET versions
  • Create a custom design using the TPSM8291x with the WEBENCH Power Designer
  • Low output noise < 20 µVRMS(100 Hz to 100 kHz)
  • Low output voltage ripple < 10 µVRMS after ferrite bead
  • High PSRR of > 65 dB (up to 100 kHz)
  • 2.2-MHz or 1-MHz fixed frequency peak current mode control
  • Synchronizable with external clock (optional)
  • Integrated loop compensation supports ferrite bead for second stage L-C filter with 30-dB attenuation (optional)
  • Spread spectrum modulation (optional)
  • 3.0-V to 17-V input voltage range
  • 0.8-V to 5.5-V output voltage range
  • 57-mΩ/20-mΩ RDSon
  • Output voltage accuracy of ±1%
  • Precise enable input allows
    • User-defined undervoltage lockout
    • Exact sequencing
  • Adjustable soft start
  • Power-good output
  • Output discharge (optional)
  • –40°C to 125°C junction temperature range
    • –55°C to 125°C for -ET versions
  • Create a custom design using the TPSM8291x with the WEBENCH Power Designer

The TPSM8291x devices are a family of high-efficiency, low-noise and low-ripple current mode synchronous buck power modules. The devices are ideal for noise sensitive applications that would normally use an LDO for post regulation such as high-speed ADCs, clock and jitter cleaner, serializer, de-serializer, and radar applications.

The devices operate at a fixed switching frequency of 2.2 MHz or 1 MHz and can be synchronized to an external clock.

To further reduce the output voltage ripple, the device integrates loop compensation to operate with an optional second-stage ferrite bead L-C filter. This feature allows an output voltage ripple below 10 µVRMS.

Low-frequency noise levels, similar to a low-noise LDO, are achieved by filtering the internal voltage reference with an integrated capacitor on the NR/SS pin. An external capacitor can be added to the module for additional filtering.

The optional spread spectrum modulation scheme spreads the DC/DC switching frequency over a wider span, which lowers the mixing spurs.

The TPSM8291x devices are a family of high-efficiency, low-noise and low-ripple current mode synchronous buck power modules. The devices are ideal for noise sensitive applications that would normally use an LDO for post regulation such as high-speed ADCs, clock and jitter cleaner, serializer, de-serializer, and radar applications.

The devices operate at a fixed switching frequency of 2.2 MHz or 1 MHz and can be synchronized to an external clock.

To further reduce the output voltage ripple, the device integrates loop compensation to operate with an optional second-stage ferrite bead L-C filter. This feature allows an output voltage ripple below 10 µVRMS.

Low-frequency noise levels, similar to a low-noise LDO, are achieved by filtering the internal voltage reference with an integrated capacitor on the NR/SS pin. An external capacitor can be added to the module for additional filtering.

The optional spread spectrum modulation scheme spreads the DC/DC switching frequency over a wider span, which lowers the mixing spurs.

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技術文件

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重要文件 類型 標題 格式選項 日期
* Data sheet TPSM8291x 3-V to 17-V, 2-A/3-A Low-Noise and Low-Ripple Buck Power Module with Integrated Ferrite Bead Filter Compensation datasheet (Rev. C) PDF | HTML 2023年 7月 18日
Application brief Solving Power Design Challenges in Semiconductor Test and ATE Applications (Rev. A) PDF | HTML 2025年 12月 2日
White paper 以低雜訊電源裝置簡化電源架構 (Rev. A) PDF | HTML 2024年 11月 19日
Technical article 如何以低雜訊和低漣波設計技術強化電源與訊號完整性 PDF | HTML 2024年 10月 4日
Application brief Solving power design challenges in oscilloscope applications PDF | HTML 2023年 10月 31日
Application brief Solving Power Design Challenges in Medical Imaging Applications PDF | HTML 2023年 7月 12日
Certificate TPSM82912EVM EU Declaration of Conformity (DoC) 2022年 9月 27日

設計與開發

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開發板

TPSM82912EVM — 適用於 2-A 低雜訊與低漣波降壓模組的 TPSM82912 評估模組

TPSM82912 評估模組 (EVM) (BSR213) 可幫助 TPSM82912 評估。TPSM82912 和 TPSM82913 為採用小型 4.5 mm 乘 5.5 mm QFN 封裝的接腳至接腳相容低雜訊 (< 20 μVRMS) 和低漣波 (< 10 μVRMS) 降壓電源模組。BSR213-001 使用 3 A TPSM82913 從 3 V 到 17 V 輸入電壓輸出 1.2 V 輸出電壓。BSR213-002 使用 2 A TPSM82912 從高達 17 V 的輸入電壓輸出 3.3 V 輸出電壓。
使用指南: PDF | HTML
TI.com 無法提供
模擬型號

TPSM82912 PSPICE Transient Model

SLVMDZ0.ZIP (373 KB) - PSpice Model
模擬型號

TPSM82912 SIMPLIS Transient Model

SLVMDZ1.ZIP (672 KB) - SIMPLIS Model
參考設計

TIDA-010962 — Automated test equipment (ATE) 80V discrete floating VI reference design

This reference design presents a four-quadrant discrete floating Voltage and Current (VI) design. Voltage output supports ±40V and 0V to 80V ranges, with three current ranges of 500mA, 10mA, and 10μA. The design operates on force voltage (FV), force current (FI), Buffer, and Gang mode with analog (...)
Design guide: PDF
封裝 針腳 CAD 符號、佔位空間與 3D 模型
B0QFN (RDU) 28 Ultra Librarian

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