|Package | PIN:||VQFN (RGZ) | 48|
|Temp:||Q (-40 to 125)|
- Multiple Operating Modes
- Media Support: Copper andFiber
- Media Conversion Between Copper andFiber
- Bridge Between RGMII andSGMII
- Maximum Ambient Temperature of 125ºC
- Exceeds 8-kV IEC61000-4-2 ESD
- Low RGMII Latency
- Total Latency ≤ 384ns for 1000Base-T
- Total Latency ≤ 361ns for 100Base-TX
- Low Power Consumption
- < 150 mW for1000Base-X
- < 500 mW for1000Base-T
- Time Sensitive Network (TSN) Compliant
- Recovered Clock Output for SyncE
- Selectable Synchronized Clock Output: 25 MHz and 125 MHz
- 1000Base-X, 100Base-FX Compatible With SFP MSA Specification
- IEEE1588 Support via SFD
- Wake On LAN Support
- Configurable IO Voltages: 1.8 V, 2.5 V, and 3.3 V
- SGMII, RGMII, MII MAC Interface
- Jumbo Frame Support for 1000M and 100M Speed
- Cable Diagnostics
- Programmable RGMII Termination Impedance
- Integrated MDI Termination Resistor
- Fast Link Drop modes
- Compatible to IEEE 802.3 1000Base-T, 100Base-TX, 10Base-Te,1000Base-X, 100Base-FX
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Texas Instruments DP83869HMRGZT
The DP83869HM device is a robust, fully-featured Gigabit Physical Layer (PHY) transceiverwith integrated PMD sublayers that supports 10BASE-Te, 100BASE-TX and 1000BASE-T Ethernetprotocols. The DP83869 also supports 1000BASE-X and 100BASE-FX Fiber protocols. Optimized for ESDprotection, the DP83869HM exceeds 8-kV IEC 61000-4-2 (direct contact).This device interfaces to theMAC layer through Reduced GMII (RGMII) and SGMII. In 100M mode, the device lets the designer useMII for lower Latency. Programmable integrated termination impedance on RGMII/MII helps reducesystem BOM.
The DP83869HM supports Media Conversion in Managed mode. In this mode, the DP83869HM canrun 1000BASE-X-to-1000BASE-T and 100BASE-FX-to-100BASE-TX conversions.
The DP83869HM can also support Bridge Conversion from RGMII to SGMII and SGMII to RGMII.The DP83869HM is compliant to TSN standards and offers low latency.
The DP83869HM can also generate IEEE 1588 Sync Frame Detect indications to MAC. This canreduce the jitter in Time Synchronization and help the System account for asymmetric delays inTransmission and Reception of packets.
The standard Ethernet system block diagram is shown on the first page. Designers can alsouse the DP83869 in Media Convertor mode, in RGMII-to-SGMII Bridge applications, and in SGMII-RGMIIBridge applications.