SBOU024C august   2004  – july 2023 PGA309

 

  1.   1
  2.   Read This First
    1.     About This Manual
    2.     Related Documentation from Texas Instruments
    3.     If You Need Assistance
    4.     Information About Cautions and Warnings
    5.     FCC Warning
    6.     Trademarks
  3. 1Introduction
    1. 1.1  PGA309 Functional Description
    2. 1.2  Sensor Error Adjustment Range
    3. 1.3  Gain Scaling
    4. 1.4  Offset Adjustment
    5. 1.5  Voltage Reference
    6. 1.6  Sensor Excitation and Linearization
    7. 1.7  ADC for Temperature Sensing
    8. 1.8  External EEPROM and Temperature Coefficients
    9. 1.9  Fault Monitor
    10. 1.10 Over-Scale and Under-Scale Limits
    11. 1.11 Power-Up and Normal Operation
    12. 1.12 Digital Interface
    13. 1.13 Pin Configuration
  4. 2Detailed Description
    1. 2.1  Gain Scaling
      1. 2.1.1 PGA309 Transfer Function
      2. 2.1.2 Solving For Gain Settings
    2. 2.2  Offset Scaling
    3. 2.3  Zero DAC and Gain DAC Architecture
    4. 2.4  Output Amplifier
    5. 2.5  Reference Voltage
    6. 2.6  Linearization Function
      1. 2.6.1 System Definitions
      2. 2.6.2 Key Linearization Design Equations
        1. 2.6.2.1 Lin DAC Counts Conversion
      3. 2.6.3 Key Ideal Design Equations
        1. 2.6.3.1 Linearization Design
        2.       37
    7. 2.7  Temperature Measurement
      1. 2.7.1 Temp ADC Start-Convert Control
      2. 2.7.2 External Temperature Sensing with an Excitation Series Resistor
    8. 2.8  Fault Monitor
    9. 2.9  Over-Scale and Under-Scale
      1. 2.9.1 Over-Scale and Under-Scale Calculation
      2.      44
    10. 2.10 Noise and Coarse Offset Adjust
    11. 2.11 General AC Considerations
  5. 3Operating Modes
    1. 3.1 Power-On Sequence and Normal Stand-Alone Operation
    2. 3.2 EEPROM Content and Temperature Lookup Table Calculation
      1. 3.2.1 Temperature Lookup Table Calculation
        1. 3.2.1.1 Temperature Lookup Table Calculation
        2.       52
        3.       53
    3. 3.3 Checksum Error Event
    4. 3.4 Test Pin
    5. 3.5 Power-On Initial Register States
      1. 3.5.1 PGA309 Power-Up State
  6. 4Digital Interface
    1. 4.1  Description
    2. 4.2  Two-Wire Interface
      1. 4.2.1 Device Addressing
      2. 4.2.2 Two-Wire Access to PGA309
    3. 4.3  One-Wire Interface
    4. 4.4  One-Wire Interface Timeout
    5. 4.5  One-Wire Interface Timing Considerations
    6. 4.6  Two-Wire Access to External EEPROM
    7. 4.7  One-Wire Interface Initiated Two-Wire EEPROM Transactions
    8. 4.8  PGA309 Stand-Alone Mode and Two-Wire Transactions
    9. 4.9  PGA309 Two-Wire Bus Master Operation and Bus Sharing Considerations
    10. 4.10 One-Wire Operation with PRG Connected to VOUT
    11. 4.11 Four-Wire Modules and One-Wire Interface (PRG)
  7. 5Application Background
    1. 5.1 Bridge Sensors
    2. 5.2 System Scaling Options for Bridge Sensors
      1. 5.2.1 Absolute Scale
      2. 5.2.2 Ratiometric Scale
    3. 5.3 Trimming Real World Bridge Sensors for Linearity
    4. 5.4 PGA309 Calibration Procedure
  8. 6Register Descriptions
    1. 6.1 Internal Register Overview
    2. 6.2 Internal Register Map
      1. 6.2.1 Register 0: Temp ADC Output Register (Read Only, Address Pointer = 00000)
      2. 6.2.2 Register 1: Fine Offset Adjust (Zero DAC) Register (Read/Write, Address Pointer = 00001)
      3. 6.2.3 Register 2: Fine Gain Adjust (Gain DAC) Register (Read/Write, Address Pointer = 00010)
      4. 6.2.4 Register 3: Reference Control and Linearization Register (Read/Write, Address Pointer = 00011)
      5. 6.2.5 Register 4: PGA Coarse Offset Adjust and Gain Select/Output Amplifier Gain Select Register (Read/Write, Address Pointer = 00100)
      6. 6.2.6 Register 5: PGA Configuration and Over/Under-Scale Limit Register (Read/Write, Address Pointer = 00101)
      7. 6.2.7 Register 6: Temp ADC Control Register (Read/Write, Address Pointer = 00110)
      8. 6.2.8 Register 7: Output Enable Counter Control Register (Read/Write, Address Pointer = 00111)
      9. 6.2.9 Register 8: Alarm Status Register (Read Only, Address Pointer = 01000)
  9.   A External EEPROM Example
    1.     A.1 PGA309 External EEPROM Example
      1.      A.1.1 Gain and Offset Scaling for External EEPROM
      2.      94
  10.   B Detailed Block Diagram
    1.     B.1 Detailed Block Diagram
  11.   C Glossary
  12.   Revision History

4.10 One-Wire Operation with PRG Connected to VOUT

Some sensor applications, require the end-user access to three pins, VS, GND, and Sensor Out. It is also desired in these applications to digitally calibrate the sensor module after its final assembly of sensor and electronics. The PGA309 has a mode that allows the One-Wire interface pin (PRG) to be tied directly to the PGA309 output pin (VOUT), as shown in Figure 4-15.

For the PGA309 + sensor calibration, it is necessary to configure and reconfigure internal registers on the PGA309 and then measure the analog voltage on VOUT as a result of these register value settings. To do this while VOUT is tied to PRG requires the ability to enable and disable VOUT. This allows a multiplexing operation between PRG using the connection as a bidirectional digital interface and VOUT driving the connection as a conditioned sensor output voltage. In addition, it is convenient to configure the Temp ADC for Single Start Convert mode and delay the start of the Temp ADC until after VOUT is enabled and internal circuitry has had a chance to settle to accurate final values. This is especially important in applications that use the Linearization Circuit, tie the sensor to VEXC, and measure temperature external to the PGA309 (that is, a temperature sense series resistor in the upper or lower excitation leg of the bridge sensor).

Register 7 (Output Enable Counter Control Register) contains the control bits for setting both the amount of time VOUT is active on the common connection and also the delay from the time VOUT is enabled to the start of a Temp ADC conversion. These individual bits are defined in Table 4-3 and Table 4-4.

GUID-2A0DC5FD-E5C1-4E7F-9092-278ABAFB9FC5-low.gifFigure 4-15 One-Wire Operation with PRG Tied to VOUT
Table 4-3 Temp ADC—Delay After VOUT Enable (Register 7)
DLY3
[11]		DLY2
[10]		DLY1
[9]		DLY0
[8]		Decimal Equivalent
(Initial Counter Value)		Temp ADC
Delay
(ms)(1)
000000
0001110
0010220
0011330
0100440
0101550
0110660
0111770
1000880
1001990
101010100
101111110
110012120
110113130
111014140
111115150
(1) Temp ADC delay = intial counter value x 10ms.
Table 4-4 Output Enable Counter for One-Wire Interface/VOUT Multiplexed Mode (Register 7)
Digital In put (Binary)
OEN7......OEN0
[7......0]		Decimal Equivalent
(Initial Counter Value)		VOUT Enable Timeout
(ms)
0000 000000 (VOUT Disabled)
0010 000032320
0100 000064640
0110 000096960
1000 00001281280
1010 00001601600
1100 00001921920
1110 00002242240
1111 11112552550

Figure 4-16 details the output enable/disable state machine. Upon initial POR, there is a 25ms wait for communication through either digital interface to prevent the PGA309 from going through its POR sequence and reaching Stand-Alone Mode. The output enable/disable state machine can be forced to run at any time the PGA309 is powered and either digital interface (One-Wire or Two-Wire) can write to Register 7. Writing a non-zero value to OEN7:OEN0 will cause VOUT to be immediately enabled and the Output Enable Counter to be loaded with the OEN7:OEN0 value (decimal equivalent x 10ms = initial Output Enable Counter value). VOUT remains enabled until this initial Output Enable Counter value is decremented to 0 by 10ms increments. VOUT is then disabled and a one second timeout begins waiting for bus activity on either digital interface (PRG pin for three-wire sensor application). As long as there is activity on the PRG pin, the one second timeout will be continually reset. After one second of no bus activity, the PGA309 stops and the state machine will try to read the EEPROM. It is important to store invalid data in the programmed flag values of the EEPROM for this calibration process, to prevent it from being read, which could change the register settings in the PGA309. This will also force the one second timeout to be reset and allow as long as needed for communication to start and stop on PRG. Once all registers in the PGA309 have been set to their desired values, another write to Register 7 will start the process all over again so a new analog value of VOUT can be measured.

GUID-250B04DF-3F0D-406B-ACA4-87E357E78B29-low.gif
  1. For calibration using PRG tied to VOUT, set EEPROM programmed flag values to invalid values to prevent PGA309 registers from having their values changed by EEPROM register configuration and lookup table data.
  2. In PGA309 Stand−Alone mode, if OWD (Register 4 [15]) is set to ’1’ in the first part of EEPROM (configuration part), then the One−Wire interface is disabled and the only way to communicate over the One−Wire interface is to cycle power on the PGA309 and begin communication over the One−Wire interface within 25ms of power on.
Figure 4-16 Output Enable/Disable State Machine

The second part of the output enable/disable state machine is the Temp ADC delay. During calibration, the Temp ADC conversion results will be needed at different calibration temperatures. These readings combined with measured VOUT at the respective calibration temperatures are used to calculate the final temperature coefficients to be stored in the Lookup Table part of the external EEPROM. To use this function, the Temp ADC must be set to Single Start Convert mode (CEN = 0, Register 6 [10]). After a write to Register 7, the Temp ADC delay counter is loaded with the DLY3:DLY0 value (decimal equivalent x 10ms = initial Temp ADC delay counter value). This initial Temp ADC delay counter value is decremented to 0 by 10ms increments. When it reaches 0, a single Temp ADC conversion is triggered. No additional write to Register 6 [12] (the ADCS bit) is needed to initiate the conversion. Upon completion of the conversion, this branch of the state machine returns to waiting for the next valid Register 7 write.

The output enable/disable state machine allows three-wire sensor applications to measure temperature through the PGA309, against the calibration standard, for the PGA309 + sensor combination. It also allows PGA309 + sensor characteristics over pressure and temperature to be measured through the PGA309. These real-world results allow for accurate calculation of temperature coefficients for the Lookup Table and, therefore, accurate PGA309 + sensor digital calibration on a module-by-module basis.

The values of the Fault Monitor Alarm bits are latched immediately before the output is disabled to allow their values to be read through the One-Wire interface during factory calibration.

Once the final values are to be programmed into the EEPROM, it is desirable to have the One-Wire Interface disabled in three-wire sensor applications. This prevents VOUT changes in the final end-use from being read back into the PGA309 through the One-Wire interface (PRG pin) and potentially misinterpreted as bus activity, which could then cause VOUT to become disabled. To disable the One-Wire Interface, set the OWD bit to ‘1’ during the final EEPROM program write. The OWD (One-Wire Disable) bit is located in Register 4 [15]. After this final programming, the only way to communicate to the One-Wire Interface (PRG pin) is to cycle power on the PGA309 and begin communication within 33ms.