SBOU024C august   2004  – july 2023 PGA309

 

  1.   1
  2.   Read This First
    1.     About This Manual
    2.     Related Documentation from Texas Instruments
    3.     If You Need Assistance
    4.     Information About Cautions and Warnings
    5.     FCC Warning
    6.     Trademarks
  3. 1Introduction
    1. 1.1  PGA309 Functional Description
    2. 1.2  Sensor Error Adjustment Range
    3. 1.3  Gain Scaling
    4. 1.4  Offset Adjustment
    5. 1.5  Voltage Reference
    6. 1.6  Sensor Excitation and Linearization
    7. 1.7  ADC for Temperature Sensing
    8. 1.8  External EEPROM and Temperature Coefficients
    9. 1.9  Fault Monitor
    10. 1.10 Over-Scale and Under-Scale Limits
    11. 1.11 Power-Up and Normal Operation
    12. 1.12 Digital Interface
    13. 1.13 Pin Configuration
  4. 2Detailed Description
    1. 2.1  Gain Scaling
      1. 2.1.1 PGA309 Transfer Function
      2. 2.1.2 Solving For Gain Settings
    2. 2.2  Offset Scaling
    3. 2.3  Zero DAC and Gain DAC Architecture
    4. 2.4  Output Amplifier
    5. 2.5  Reference Voltage
    6. 2.6  Linearization Function
      1. 2.6.1 System Definitions
      2. 2.6.2 Key Linearization Design Equations
        1. 2.6.2.1 Lin DAC Counts Conversion
      3. 2.6.3 Key Ideal Design Equations
        1. 2.6.3.1 Linearization Design
        2.       37
    7. 2.7  Temperature Measurement
      1. 2.7.1 Temp ADC Start-Convert Control
      2. 2.7.2 External Temperature Sensing with an Excitation Series Resistor
    8. 2.8  Fault Monitor
    9. 2.9  Over-Scale and Under-Scale
      1. 2.9.1 Over-Scale and Under-Scale Calculation
      2.      44
    10. 2.10 Noise and Coarse Offset Adjust
    11. 2.11 General AC Considerations
  5. 3Operating Modes
    1. 3.1 Power-On Sequence and Normal Stand-Alone Operation
    2. 3.2 EEPROM Content and Temperature Lookup Table Calculation
      1. 3.2.1 Temperature Lookup Table Calculation
        1. 3.2.1.1 Temperature Lookup Table Calculation
        2.       52
        3.       53
    3. 3.3 Checksum Error Event
    4. 3.4 Test Pin
    5. 3.5 Power-On Initial Register States
      1. 3.5.1 PGA309 Power-Up State
  6. 4Digital Interface
    1. 4.1  Description
    2. 4.2  Two-Wire Interface
      1. 4.2.1 Device Addressing
      2. 4.2.2 Two-Wire Access to PGA309
    3. 4.3  One-Wire Interface
    4. 4.4  One-Wire Interface Timeout
    5. 4.5  One-Wire Interface Timing Considerations
    6. 4.6  Two-Wire Access to External EEPROM
    7. 4.7  One-Wire Interface Initiated Two-Wire EEPROM Transactions
    8. 4.8  PGA309 Stand-Alone Mode and Two-Wire Transactions
    9. 4.9  PGA309 Two-Wire Bus Master Operation and Bus Sharing Considerations
    10. 4.10 One-Wire Operation with PRG Connected to VOUT
    11. 4.11 Four-Wire Modules and One-Wire Interface (PRG)
  7. 5Application Background
    1. 5.1 Bridge Sensors
    2. 5.2 System Scaling Options for Bridge Sensors
      1. 5.2.1 Absolute Scale
      2. 5.2.2 Ratiometric Scale
    3. 5.3 Trimming Real World Bridge Sensors for Linearity
    4. 5.4 PGA309 Calibration Procedure
  8. 6Register Descriptions
    1. 6.1 Internal Register Overview
    2. 6.2 Internal Register Map
      1. 6.2.1 Register 0: Temp ADC Output Register (Read Only, Address Pointer = 00000)
      2. 6.2.2 Register 1: Fine Offset Adjust (Zero DAC) Register (Read/Write, Address Pointer = 00001)
      3. 6.2.3 Register 2: Fine Gain Adjust (Gain DAC) Register (Read/Write, Address Pointer = 00010)
      4. 6.2.4 Register 3: Reference Control and Linearization Register (Read/Write, Address Pointer = 00011)
      5. 6.2.5 Register 4: PGA Coarse Offset Adjust and Gain Select/Output Amplifier Gain Select Register (Read/Write, Address Pointer = 00100)
      6. 6.2.6 Register 5: PGA Configuration and Over/Under-Scale Limit Register (Read/Write, Address Pointer = 00101)
      7. 6.2.7 Register 6: Temp ADC Control Register (Read/Write, Address Pointer = 00110)
      8. 6.2.8 Register 7: Output Enable Counter Control Register (Read/Write, Address Pointer = 00111)
      9. 6.2.9 Register 8: Alarm Status Register (Read Only, Address Pointer = 01000)
  9.   A External EEPROM Example
    1.     A.1 PGA309 External EEPROM Example
      1.      A.1.1 Gain and Offset Scaling for External EEPROM
      2.      94
  10.   B Detailed Block Diagram
    1.     B.1 Detailed Block Diagram
  11.   C Glossary
  12.   Revision History

GUID-70D028EB-752A-429F-817D-7892D962382A-low.gif Figure 7-2 Gain and Offset Scaling for External EEPROM Example
Table 7-2 Final Values for External EEPROM Example
8-Bit EEPROM Load Location ‘1’ Location ‘0’
PGA309 External EEPROM First Part
(Configuration Data)		 8 4 2 1 8 4 2 1 8 4 2 1 8 4 2 1
Upper Byte Lower Byte
External EEPROM Address (Decimal) PGA309 Internal Reg Address PGA309 Internal Address Description Data D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 Hex Equiv
1/0
MSB/LSB		 Programmed flag value must be as shown 0 1 0 1 0 1 0 0 0 1 0 0 1 0 0 1 5449
3/2
MSB/LSB		 Unused; set to zero 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0000
5/4
MSB/LSB		 Unused; set to zero 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0000
7/6
MSB/LSB		 00011
(Register 3)		 Reference Control and Linearization RFB RFB RFB RFB EXS EXEN RS REN LD7 LD6 LD5 LD4 LD3 LD2 LD1 LD0
7/6 0 0 0 0 0 1 0 1 0 0 0 0 0 0 0 0 0500
9/8
MSB/LSB		 00100
(Register 4)		 PGA Coarse Offset and Gain/Output Amplifier Gain OWD GO2 GO1 GO0 GI3 GI2 GI1 GI0 RFB RFB RFB OS4 OS3 OS2 OS1 OS0
9/8 0 0 0 1 0 1 1 0 0 0 0 1 0 0 0 1 1611
11/10
MSB/LSB		 00101
(Register 5)		 PGA Configuration and Over/Under Scale Limit RFB RFB CLK_ CFG1 CLK_ CFG0 EXTEN INTEN EXTPOL INTPOL RFB OU EN HL2 HL1 HL0 LL2 LL1 LL0
11/10 0 0 0 0 1 0 1 0 0 1 0 0 0 1 1 1 0A47
13/12
MSB/LSB		 00110
(Register 6)		 Temperature ADC
Control		 RFB RFB ADC2X ADCS ISEN CEN TEN AREN RV1 RV0 M1 M0 G1 G0 R1 R0
13/12 0 0 0 0 0 1 1 0 0 0 0 0 0 0 1 1 1603
SUM = 8FA4h
15/14
MSB/LSB		 FFFF – sum(hex equiv of each location – 1/10 through 13/12) truncated above 16 bits Checksum1 1 0 0 0 0 0 0 0 0 1 1 0 1 1 0 0 705B
17/16
MSB/LSB		 T0
(Temp Index value for Temp ≤ T0)		 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0800
19/18
MSB/LSB		 Z0
(Zero DAC value for Temp ≤ T0)		 0 0 0 0 0 1 1 0 0 1 0 0 0 0 0 0 0640
21/20
MSB/LSB		 G0
(Gain DAC value for Temp ≤ T0)		 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 FFFF
23/22
MSB/LSB		 TEND (end of Lookup Table) 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 7FFF
25/24
MSB/LSB		 ZMEND (end of Lookup Table) 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0000
SUM = 18E3Eh
27/26
MSB/LSB		 FFFF – sum(hex equiv of each location – 17/16 through 25/24) truncated above 16 bits GMEND
(Checksum2)		 1 0 1 0 0 0 1 0 0 0 1 0 1 0 1 1 71C1