SBOU024C august 2004 – july 2023 PGA309
The sensor offset adjustment is performed in two stages. The input referred Coarse Offset Adjust DAC has approximately a ±60mV offset adjustment range for a selected VREF of 5V. The fine offset and the offset drift are canceled by the 16-bit Zero DAC that sums the signal with the output of the Front-End PGA. Similar to the Gain DAC, the input digital values of the Zero DAC are controlled by the data in the Temperature Compensation Lookup Table, stored in external EEPROM, driven by the Temp ADC. The programming range of the Zero DAC is 0 to VREF, with an output range of 0.1V to VSA − 0.1V.