The LMK01801 is a very low noise solution for clocking systems that require distribution and frequency division of precision clocks.
The LMK01801 features extremely low residual noise, frequency division, digital and analog delay adjustments, and fourteen (14) programmable differential outputs: LVPECL, LVDS and LVCMOS (2 outputs per differential output).
The LMK01801 features two independent inputs that can be driven differentially (LVDS, LVPECL) or in single-ended mode (LVCMOS, RF Sinewave). The first input drives output Bank A consisting of eight (8) outputs. The second input drives output Bank B consisting of six (6) outputs.
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|Part number||Order||Additive RMS jitter (Typ) (fs)||Output frequency (Max) (MHz)||Input level||Number of outputs||Output level||VCC (V)||VCC out (V)||Input frequency (Max) (MHz)||Operating temperature range (C)|
LVDS and LVCMOS
|3.3||3.3||3100||-40 to 85|