Concerto Microcontroller - F28M35M52C

F28M35M52C (PREVIEW)

Concerto Microcontroller

Description

The Concerto family is a multicore system-on-chip microcontroller unit (MCU) with independent communication and real-time control subsystems. The F28M35x family of devices is the first series in the Concerto family.

The communications subsystem is based on the industry-standard 32-bit ARM Cortex-M3 CPU and features a wide variety of communication peripherals, including Ethernet 1588, USB OTG with PHY, CAN, UART, SSI, I2C, and an external interface.

The real-time control subsystem is based on TI’s industry-leading proprietary 32-bit C28x floating-point CPU and features the most flexible and high-precision control peripherals, including ePWMs with fault protection, and encoders and captures—all as implemented by TI’s TMS320C2000 Piccolo and Delfino families. In addition, the C28-CPU has been enhanced with the addition of the VCU instruction accelerator that implements efficient Viterbi, Complex Arithmetic, 16-bit FFTs and CRC algorithms.

A high-speed analog subsystem and supplementary RAM memory is shared, along with on-chip voltage regulation and redundant clocking circuitry. Safety considerations also include Error Correction Code (ECC), parity, and code secure memory, as well as documentation to assist with system-level industrial safety certification.

Features

  • Master Subsystem — ARM Cortex-M3
    • Up to 100 MHz
    • Cortex-M3 Core Hardware Built-in Self-Test
    • Embedded Memory
      • Up to 512KB of Flash (ECC)
      • Up to 32KB of RAM (ECC or Parity)
      • Up to 64KB of Shared RAM
      • 2KB of IPC Message RAM
    • 5 Universal Asynchronous Receiver/Transmitters (UARTs)
    • 4 Synchronous Serial Interfaces (SSIs) and Serial Peripheral Interface (SPI)
    • 2 Inter-integrated Circuits (I2Cs)
    • Universal Serial Bus On-the-Go (USB-OTG) + PHY
    • 10/100 ENET 1588 MII
    • 2 Controller Area Networks (CANs)
    • 32-Channel Micro Direct Memory Access (µDMA)
    • Dual Security Zones (128-Bit Password per Zone)
    • External Peripheral Interface (EPI)
    • Micro Cyclic Redundancy Check (µCRC) Module
    • 4 General-Purpose Timers
    • 2 Watchdog Timer Modules
    • Endianness: Little Endian
  • Clocking
    • On-chip Crystal Oscillator and External Clock Input
    • Dynamic Phase-Locked Loop (PLL) Ratio Changes Supported
  • 1.2-V Digital, 1.8-V Analog, 3.3-V I/O Design
  • Interprocessor Communications (IPC)
    • 32 Handshaking Channels
    • 4 Channels Generate IPC Interrupts
    • Can be Used to Coordinate Transfer of Data Through IPC Message RAMs
  • Up to 74 Individually Programmable, Multiplexed General-Purpose Input/Output (GPIO) Pins
    • Glitch-free I/Os
  • Control Subsystem — TMS320C28x 32-Bit CPU
    • Up to 150 MHz
    • C28x Core Hardware Built-in Self-Test
    • Embedded Memory
      • Up to 512KB of Flash (ECC)
      • Up to 36KB of RAM (ECC or Parity)
      • Up to 64KB of Shared RAM
      • 2KB of IPC Message RAM
    • IEEE-754 Single-Precision Floating-Point Unit (FPU)
    • Viterbi, Complex Math, CRC Unit (VCU)
    • Serial Communications Interface (SCI)
    • SPI
    • I2C
    • 6-Channel Direct Memory Access (DMA)
    • 9 Enhanced Pulse Width Modulator (ePWM) Modules
      • 18 Outputs (16 High-Resolution)
    • 6 32-Bit Enhanced Capture (eCAP) Modules
    • 3 32-Bit Enhanced Quadrature Encoder Pulse (eQEP) Modules
    • Multichannel Buffered Serial Port (McBSP)
    • EPI
    • One Security Zone (128-Bit Password)
    • 3 32-Bit Timers
    • Endianness: Little Endian
  • Analog Subsystem
    • Dual 12-Bit Analog-to-Digital Converters (ADCs)
    • Up to 2.88 MSPS
    • Up to 20 Channels
    • 4 Sample-and-Hold (S/H) Circuits
    • Up to 6 Comparators With 10-Bit Digital-to-Analog Converter (DAC)
  • Package
    • 144-Pin RFP PowerPAD Thermally Enhanced Thin Quad Flatpack (HTQFP)

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Related end equipment

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  • Power Line Communications

Parametrics Compare all products in F28M3x MCUs

 
CPU
Peak MMACS
FPU
Frequency (MHz)
RISC Frequency (MHz)
RAM (KB)
Flash (KB)
EMIF
DMA (Ch)
PWM (Ch)
CAP/QEP
ADC Resolution
# of ADC Modules
ADC Sample & Hold
ADC Conversion Time (ns)
I2C
ADC Channels
UART (SCI)
SPI
CAN (#)
Timers
GPIO
USB
McBSP
Pin/Package
Operating Temperature Range (C)
F28M35M52C
C28x, Cortex-M3    
112    
Yes    
75    
75    
136    
1024    
Yes    
1 6-Ch DMA, 1 32-ch DMA    
24    
6 / 3    
12-bit    
2    
Dual    
172    
3    
20    
6    
5    
2    
3 32-Bit CPU
1 WD    
64    
1    
1    
144HTQFP    
-40 to 105
-40 to 125    
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