SBAS813 June 2018 ADS8688AT
PRODUCTION DATA.
The ADS8688AT features an internal overvoltage protection circuit on each of the eight analog input channels. Use these protection circuits as a secondary protection scheme to protect the device. Using external protection devices against surges, electrostatic discharge (ESD), and electrical fast transient (EFT) conditions is highly recommended. Figure 66 shows the conceptual block diagram of the internal overvoltage protection (OVP) circuit.
As shown in Figure 66, the combination of the 1-MΩ input resistors along with the PGA gain-setting resistors (RFB and RDC) limit the current flowing into the input pins. A combination of antiparallel diodes (D1 and D2) are added on each input pin to protect the internal circuitry and set the overvoltage protection limits.
Table 1 explains the various operating conditions for the device when the device is powered on. Table 1 indicates that when the AVDD pin of the device is connected to the proper supply voltage (AVDD = 5 V), the internal overvoltage protection circuit can withstand up to ±20 V on the analog input pins.
INPUT CONDITION
(VOVP = ±20 V) |
TEST CONDITION | ADC OUTPUT | COMMENTS | |
---|---|---|---|---|
|VIN| < |VRANGE| | Within operating range | All input ranges | Valid | Device functions as per data sheet specifications |
|VRANGE| < |VIN| < |VOVP| | Beyond operating range but within overvoltage range | All input ranges | Saturated | ADC output is saturated, but device is internally protected (not recommended for extended time) |
|VIN| > |VOVP| | Beyond overvoltage range | All input ranges | Saturated | This usage condition may cause irreversible damage to the device |
The results indicated in Table 1 are based on an assumption that the analog input pins are driven by very low impedance sources (RS is approximately 0 Ω). However, if the sources driving the inputs have higher impedance, the current flowing through the protection diodes reduces further, thereby increasing the OVP voltage range. Higher source impedance results in gain errors and contributes to overall system noise performance.
Figure 67 shows the voltage versus current response of the internal overvoltage protection circuit when the device is powered on. According to this current-to-voltage (I-V) response, the current flowing into the device input pins is limited by the 1-MΩ input impedance. However, for voltages beyond ±20 V, the internal node voltages surpass the break-down voltage for internal transistors, thus setting the limit for overvoltage protection on the input pins.
The same overvoltage protection circuit also provides protection to the device when the device is not powered on and AVDD is floating. This condition can arise when the input signals are applied before the ADC is fully powered on. Table 2 lists the overvoltage protection limits for this condition.
INPUT CONDITION
(VOVP = ±11 V) |
TEST CONDITION | ADC OUTPUT | COMMENTS | |
---|---|---|---|---|
|VIN| < |VOVP| | Within overvoltage range | All input ranges | Invalid | Device is not functional but is protected internally by the OVP circuit |
|VIN| > |VOVP| | Beyond overvoltage range | All input ranges | Invalid | This usage condition may cause irreversible damage to the device |
Figure 68 shows the voltage versus current response of the internal overvoltage protection circuit when the device is not powered on. According to this I-V response, the current flowing into the device input pins is limited by the 1-MΩ input impedance. However, for voltages beyond ±11 V, the internal node voltages surpass the break-down voltage for internal transistors, thus setting the limit for overvoltage protection on the input pins.