DLPS037F October 2014 – June 2021 DLPC900
For structured light applications, the DLPC900 can be commanded to enter the following high speed sequential pattern modes.
These pattern modes provide the capability to display a set of patterns and signal a camera to capture these patterns overlaid on an object. The DLPC900 controller is capable of pre-loading up to 400 1-bit binary patterns into internal memory from the external flash memory or from the USB or I2C interfaces. These pre-loaded binary patterns are then streamed to the DMD at high speed.
The DLPC900 internal DRAM is capable of holding 400 1-bit images. However, when using Pre-Stored Pattern Mode the number of patterns that can be stored in External Flash depends on the size of the external flash and level of compression achievable.
The DLPC900 controller is capable of synchronizing a camera to the displayed patterns. In video pattern mode, the vertical sync is used as trigger input. In pre-stored pattern mode and pattern on-the-fly mode, an internal user configurable trigger or a TRIG_IN_1 pulse indicates to the DLPC900 controller to advance to the next pattern, while TRIG_IN_2 starts and stops the pattern sequence. In all pattern modes, TRIG_OUT_1 frames the exposure time of the pattern, while TRIG_OUT_2 indicates the start of the pattern sequence.
Figure 7-16 shows an example timing diagram of video pattern mode. The VSYNC starts the pattern sequence display. The pattern sequence consists of a series of four patterns followed by a series of three patterns and then repeats. The first pattern sequence consists of P1, P2, P3, and P4. The second pattern sequence consists of P5, P6, and P7. TRIG_OUT_1 frames each pattern exposed, while TRIG_OUT_2 indicates the start of each pattern in the sequence. If the pattern sequence is configured without dark time between patterns, then the TRIG_OUT_1 output would be high for the entire pattern sequence.
Figure 7-17 shows an example of a pre-stored pattern mode timing diagram. Pattern sequences of four are displayed. TRIG_OUT_1 frames each pattern exposed, while TRIG_OUT_2 indicates the start of each pattern in the sequence. If the pattern sequence is configured without dark time between patterns, then the TRIG_OUT_1 output would be high for the entire pattern sequence.
Another example of a pre-stored pattern mode timing diagram is shown in Figure 7-18, where pattern sequences of three are displayed. TRIG_OUT_1 frames each pattern displayed, while TRIG_OUT_2 indicates the start of each pattern. TRIG_IN_2 serves as a start and stop signal. When high, the pattern sequence starts or continues. Note, in the middle of displaying the P4 pattern, TRIG_IN_2 is low, so the sequence stops displaying P4. When TRIG_IN_2 is raised, the pattern sequence continues where it stopped by re-displaying P4.
Table 7-3 shows the allowed pattern combinations in relation to the bit depth of the pattern. If the pattern sequence is configured without dark time between patterns, then the TRIG_OUT_1 output would be high for the entire pattern sequence. For faster 8-bit pattern speeds, the illumination source can be modulated to shorten the smallest bits, and thus the larger bits. This method will introduce dark time into the pattern and affect the brightness, but it is capable of 8-bit pattern speeds up to four times faster than patterns without illumination modulation. More information on illumination modulation can be found in the DLP® LightCrafter™ Single DLPC900 Evaluation Module (EVM) User's Guide (DLPU101) or DLP® LightCrafter™ Dual DLPC900 Evaluation Module (EVM) User's Guide (DLPU102).
|BIT DEPTH||DLP6500 (µs)||DLP9000 (µs)||DLP500YX (µs)||DLP670S (µs)|
|ACTIVE BLOCKS||DLP6500 (µs)||DLP9000 (µs)||DLP500YX (µs)||DLP670S (µs)|