DLPS037F October 2014 – June 2021 DLPC900
The DLPC900 controller takes as input 16-, 20-, or 24-bit RGB data at up to 120-Hz frame rate. For example, a 120-Hz 24-bit frame is composed of three colors (red, green, and blue) with each color equally divided in the 120-Hz frame rate. Thus, each color has a 2.78-ms time slot allocated. Because each color has an 8-bit depth, each color time slot is further divided into bit-planes. A bit-plane is the 2-dimensional arrangement of one-bit extracted from all the pixels in the full color 2D image to implement dynamic depth (see Figure 7-2).
The length of each bit-plane in the time slot is weighted by the corresponding power of two of its binary representation. This provides a binary pulse-width modulation of the image. For example, a 24-bit RGB input has three colors (R, G, & B) with 8-bit depth each. Each color time slot is then divided into eight bit-planes, with the sum of the weight of all bit planes in the time slot equal to 256. Figure 7-3 illustrates the time partition of the bits in one 8-bit color time slot within a 24-bit RGB frame.
Therefore, a single video frame is composed of a series of bit-planes. Because the DMD mirrors can be either on or off, an image is created by turning on the mirrors corresponding to the bit set in a bit-plane. With binary pulse-width modulation, the intensity level of the color is reproduced by controlling the amount of time the mirror is on. For a 24-bit RGB frame image inputted to the DLPC900 controller, the DLPC900 controller creates 24 bit-planes, stores them in internal embedded DRAM, and sends them to the DMD, one bit-plane at a time. The bit weight controls the amount of time the mirror is on. To improve image quality in video frames, these bit-planes, time slots, and color frames are shuffled and interleaved within the pixel processing functions of the DLPC900 controller.