DLPS037F October 2014 – June 2021 DLPC900
The DLPC900 provides three external program memory chip selects for standard NOR-type flash:
Flash access timing is programmable up to 19 wait-states. Table 8-5 contains the formulas to calculate the required wait-states for each of the parameters shown in Figure 8-3 for a typical flash device. Refer to the DLPC900 Programmers Guide for details on how to set new wait-state values.
|TCS (CSZ low to WEZ low )||= Roundup((TCS+ 5 ns) / 6.7 ns)||2|
|TWP (WEZ low to WEZ high)||= Roundup((TWP+ 5 ns) / 6.7 ns)||11|
|TCH (WEZ high to CSZ high )||= Roundup((TCH+ 5 ns) / 6.7 ns)||2|
|TACC (CSZ low to Output Valid ) (2)||= Roundup((TACC+ 5 ns) / 6.7 ns)||19|
|Maximum supported wait-states||19 (120ns) (3)|