DLPS037F October 2014 – June 2021 DLPC900
The memory space of the DLPC900 consists of three chip-selects:
The DLPC900 is capable of accessing up to 16-megabytes of memory on each chip-select for a total of 48-megabytes. CS1 contains the firmware, and it is the power-up boot chip-select.
The memory space shown in Figure 7-6 displays how the DLPC900 accesses the memory when memory is present on all three chip selects. Although the chip-selects are numbered 0, 1, and 2, the way the DLPC900 accesses the memory is not in this order. Notice that the boot flash is located on chip select CS1.
During the power-up initialization, the DLPC900 firmware performs a query on each chip-select to determine whether there is memory present. If there is no memory present on CS1, then the DLPC900 will not boot up. Therefore, flash memory and the firmware must exist on CS1.
Notice carefully that the addresses from CS2 to CS0 are not ascending linearly in Figure 7-6. Therefore, an image cannot span across CS2 and CS0. If an image cannot entirely fit in CS2, then the entire image must be moved and stored in CS0.
If more memory space is required, the DLPC900 memory space can also be organized into a single flash memory device larger than 48-megabytes. By using the architecture shown in Figure 7-7, a flash memory device up to 128-megabytes can be attached to the DLPC900. Table 7-2 describes the memory space layout of a 128-megabyte flash device. Similar to memories attached directly to chip selects, an image also cannot span across memory blocks when using a single large flash memory with the DLPC900.
|Memory Block||Address Space (Start and End)||Single Flash Memory Addressed||Megabytes||Contents|
|0||0xF9000000 - 0xF901FFFF||0x00000000 - 0x0001FFFF||0 - 0.128||Bootloader|
|0xF9020000 - 0xF913FFFF||0x00020000 - 0x0013FFFF||0.128 - 1.15||Application binary, Sequences / Patterns|
|0xF9140000 - 0xF923FFFF||0x00140000 - 0x0023FFFF||1.15 - 2.15||Reserved space|
|0xF9240000 - 0xF9FFFFFF||0x00240000 - 0x00FFFFFF||2.15 - 15||
|1||0xFA000000 - 0xFAFFFFFF||0x01000000 - 0x01FFFFFF||16 - 31||Patterns only|
|2||0xF8000000 - 0xF8FFFFFF||0x02000000 - 0x02FFFFFF||32 - 47||Patterns only|
|3||0x03000000 - 0x03FFFFFF||0x03000000 - 0x03FFFFFF||48 - 63||Patterns only|
|4||0x04000000 - 0x04FFFFFF||0x04000000 - 0x04FFFFFF||64 - 79||Patterns only|
|5||0x05000000 - 0x05FFFFFF||0x05000000 - 0x05FFFFFF||80 - 95||Patterns only|
|6||0x06000000 - 0x06FFFFFF||0x06000000 - 0x06FFFFFF||96 - 111||Patterns only|
|7||0x07000000 - 0x07FFFFFF||0x07000000 - 0x07FFFFFF||112 - 127||Patterns only|
The design for a single 128-megabyte flash device for storing the firmware consists of the bootloader, the main application, sequences/images stored in flash (optional), and 1-megabyte of reserved space. The bootloader is located at the beginning of the flash memory block 0. The size of the bootloader is 128-kilobytes, beginning at address 0xF9000000. The bootloader is necessary for operation. If the bootloader becomes corrupted in some way it can render the device inoperable. The bootloader is followed by the main application and then sequence/image data. As mentioned above, patterns must not span memory block boundaries. If a pattern does not fit in a given block, the entire 24-bit image (or composite image) must be moved in the next block. Additionally, the 1-megabyte of reserved space in memory block 0 from 0xF9140000 to 0xF923FFFF is necessary for operation and must not be overwritten.