PWRGOOD cannot be used as an early
warning
signal for an
anticipated power down. DMDs require an enhanced power down where
the DLPC900 performs a sequence of memory loads to the DMD followed by the mirror
park instruction so that the mirrors end up in an un-landed
state. Issue
the power-down command before unplugging the power cord from the
system.
There are two scenarios to consider
when powering down DMDs supported by the DLPC900. Figure 5-3 shows a power
distribution layout for a typical system, which provides the mechanisms for both
scenarios:
- An anticipated power down, which is during a typical power down of the system.
Anticipated Power Down Timing Diagram shows a
timing diagram where an external host sends a power down command to the
microprocessor (µP). The µP must send a Power Mode = 1
"Standby" command to the DLPC900. The DLPC900 then performs
the necessary power down sequence on the DMD. The power can be safely removed
once the minimum tSB is met.
- An unanticipated power loss. In this case a power loss detection circuit must
provide a means of triggering a power loss. Figure 5-5 shows a
timing diagram where the Votage Monitor detects a power loss and deasserts
PWRGOOD. Power Regulation must maintain the DC Power Supplies until the
minimum tePH is met.. During tePH the DLPC900
performs the necessary power down sequence on the DMD. The power supplies can
be allowed to drop below their specifications once the minimum tePH
is met.
Refer to the DLPC900 Programmer's
Guide for a description of the
Power
Mode = 1
"Standby"
command.
Figure 5-4 Anticipated Power Down Timing Diagram