SNVSCF0 October 2024 LM65680-Q1
ADVANCE INFORMATION
The following example provides a detailed design procedure based on the specifications found in Table 8-5.
| DESIGN PARAMETER | VALUE |
|---|---|
| Input voltage range (steady-state) | 8V to 65V |
| Min transient input voltage (cold crank) | 4.5V |
| Max transient input voltage (load dump) | 70V |
| Output voltage | 5V |
| Output current | 0A to 8A |
| Switching frequency | 400kHz |
| Output voltage regulation | ±1% |
| Active current, no load | 15µA |
| Shutdown current | 1.3µA |
| Soft-start time | 5.3ms |
The switching frequency is set at 400kHz by resistor RRT. In terms of control loop performance, the target loop crossover frequency is 50kHz with a phase margin greater than 50°.
The selected buck regulator powertrain components are cited in Table 8-6, and many of the components are available from multiple vendors. This design uses a low-DCR, metal-powder composite inductor, and ceramic output capacitor implementation.
| REFERENCE DESIGNATOR | QTY | SPECIFICATION | MANUFACTURER | PART NUMBER |
|---|---|---|---|---|
| CIN | 4 | CAP, CERM, 4.7μF, 100V, +/- 10%, X7S, 1210, AEC-Q200 | Murata | GCM32DC72A475KE02L |
| TDK | CGA6M3X7S2A475K200 | |||
| CO | 2 | 47μF ±10% 10VDC, X7S, 1210 Embossed T/R, AEC-Q200 | Murata | GCM32EC71A476KE02K |
| 47µF, 10V, X7S, 1210, ceramic, AEC-Q200 | TDK | CGA6P1X7S1A476M250AC | ||
| LO | 1 | 3.3µH, 5.9mΩ, 10.1A, 6.71 × 6.51 × 6.1mm, AEC-Q200 | Coilcraft | XGL6060-332MEC |
| 3.3µH, 15.7mΩ, 17.7A, 6.95 × 6.6 × 4.3mm, AEC-Q200 | Cyntec | VCUW064E-3R3MS5 | ||
| 3.3µH, 10.8mΩ, 15A, 6.45 × 6.65 × 5.8mm, AEC-Q200 | Würth Electronik | 74439346033 | ||
| U1 | 1 | LM656x0-Q1 70V buck converter, AEC-Q100 | Texas Instruments | LM65680RZYRQ1 |