SPRAD21E May 2023 – February 2024 AM620-Q1 , AM623 , AM625 , AM625-Q1 , AM625SIP , AM62A3 , AM62A3-Q1 , AM62A7 , AM62A7-Q1 , AM62P , AM62P-Q1
It is recommended to connect the main voltage powering the board (such as 3.3 V, 5 V or other voltage levels) to the VMON_VSYS pin through an external resistor voltage divider (0.45 V ± 3 %) for early supply failure indication. It is recommend to implement a noise filter (capacitor) across the resistor voltage divider output since VMON_VSYS has minimum hysteresis and a high-bandwidth response to transients as described in the System Power Supply Monitor Design Guidelines section of the device-specific data sheet.
Connect VMON_1P8_SOC and VMON_3P3_SOC pins directly to their respective supplies. Refer Recommended Operating Conditions section of the device-specific data sheet for the allowed supply voltage range.
For VMON_VSYS, fail-safe condition is valid when the recommendations in section System Power Supply Monitor Design Guidelines of device-specific data sheet are followed.
For VMON_1P8_SOC and VMON_3P3_SOC pins, the fail-safe condition is valid when the supply voltage connected is within the Recommended Operating Conditions or Absolute Maximum Ratings sections of device-specific data sheet.