SLASFL3 September   2026 DAC90802

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Timing Requirements
    7. 5.7 Timing Diagrams
    8. 5.8 Typical Characteristics
      1. 5.8.1 Typical Characteristics: Linearity
      2. 5.8.2 Typical Characteristics: Glitch
      3. 5.8.3 Typical Characteristics: Multiplying Mode
      4. 5.8.4 Typical Characteristics: Fast-Settling Mode
      5. 5.8.5 Typical Characteristics: AWG Mode
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Digital-to-Analog Converters
        1. 6.3.1.1 Reference
        2. 6.3.1.2 Output Span
          1. 6.3.1.2.1 Gain Overrange
        3. 6.3.1.3 Output Synchronization
        4. 6.3.1.4 Thermal Sensors
      2. 6.3.2 Power-On
      3. 6.3.3 Serial Data Interface
        1. 6.3.3.1 SPI Configurations
        2. 6.3.3.2 SPI Stream Mode
        3. 6.3.3.3 SPI Daisy Chain Mode
    4. 6.4 Device Functional Modes
      1. 6.4.1 AWG Mode
      2. 6.4.2 Fast Settling Mode
      3. 6.4.3 Multiplying Mode
  8. 7 Register Maps
    1. 7.1 COMMON Registers
    2. 7.2 HS_DATA Registers
    3. 7.3 HR_DATA Registers
  9. 8 Application and Implementation
    1. 8.1 Application
    2. 8.2 Design Requirements
      1. 8.2.1 Reference Signal Chain Information
        1. 8.2.1.1 DC Reference
        2. 8.2.1.2 AC Reference
      2. 8.2.2 Optimising the Self-Heating Trim to Achieve Lowest THD Across Frequencies for High Voltage Swing
      3. 8.2.3 Digital Interface
      4. 8.2.4 Grounding Recommendations
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Recommendation
      2. 8.4.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Related Documentation
    2. 9.2 Receiving Notification of Documentation Updates
    3. 9.3 Support Resources
    4. 9.4 Trademarks
    5. 9.5 Electrostatic Discharge Caution
    6. 9.6 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

DC Reference

The DAC90802 references remain nominally constant throughout AWG mode and fast settling mode operation. For improved THD performance in AWG mode, a 2-wire connection with a dedicated low-impedance driver amplifier for each signal is recommended. This minimizes dynamic reference loading while changing DAC codes. If a 2-wire design is not used (for example, when sharing references across channels), short the _Fx and _Sx pins. The following two reference generation methods are recommended for these application cases:

  • DC Reference Signal Chain Using Internal Inversion: This configuration utilizes internal temperature-coefficient (temp-co) matched resistors (R1 and R2, see Section 5.5) to generate the negative reference using an external operational amplifier as Figure 8-1 shows
DAC90802 DC Reference Signal Chain
                    Using Internal Inversion Figure 8-1 DC Reference Signal Chain Using Internal Inversion
  • DC Reference Signal Chain Using External inversion: This method is recommended when internal resistor temperature-coefficient matching is insufficient for reference inversion, when a stable negative reference voltage is available at the system-level, or when the reference is shared between multiple channels as Figure 8-2 shows
DAC90802 DC Reference Signal Chain
                    Using External Inversion Figure 8-2 DC Reference Signal Chain Using External Inversion

Use a gain stage following the voltage reference to achieve high reference voltages (≥10V). To reduce signal chain noise, use an additional (3Hz shown) low-pass filter before the DAC reference buffers. To maximize the performance of the DAC90802, the selection of the reference IC and reference buffers must consider the following aspects:

  • Reference IC selection:
    • Output Voltage Accuracy (initial tolerance): Output voltage inaccuracy results in absolute gain error; therefore, select ICs with appropriate initial output voltage accuracy, and tolerance according to application requirements
    • Output Voltage Temperature Coefficient: Output voltage temperature coefficient affects DAC accuracy and precision (End-point errors, INL, and DNL) across temperature. The equation below gives a good estimate of the temperature coefficient requirement of the reference device corresponding to the DAC resolution. Output of the reference IC for a ∆T change in temperature shown in Equation 4. For N-bit DAC to keep the change below 1LSB shown in Equation 5.
      Equation 4. V R E F = V R E F i n i t i a l ( 1 + ( T e m p c o ) × ∆ T × 10 - 6 ) ( T e m p c o   i n   p p m C )
      Equation 5. ∆ V R E F = V R E F i n i t i a l × T e m p c o × ∆ T × 10 - 6 < ( 1 L S B =   V R E F i n i t i a l 2 N )
      Equation 6. T e m p c o   <   10 6 2 N × ∆ T   ( A b o u t   0.76 p p m C   f o r   a   5 ° C   ∆ T   a t   18   b i t   p r e c i s i o n )
    • Output Noise: For high precision applications, reference output voltage noise becomes a critical source of system noise
      • Flicker Noise: Flicker noise is defined as the integrated 0.1Hz to 10Hz noise in the time-domain (VPP). This primarily affects the dc output characteristics such as INL, DNL and end-point errors. For best performance, the flicker noise level must be well below 1LSB; for an 18-bit DAC and ±5V reference, this translates to a target of < 3.8μVPP (0.1LSB)
      • Thermal/Broadband Noise: Thermal noise predominantly affects AC performance, serving as the primary noise source for SNR and THD+N measurements. Since the dc reference signal chain remains static during operation, a single-order low-pass filter is sufficient to mitigate reference device thermal noise. Figure 8-1 and Figure 8-2 indicate a 3Hz low-pass filter for this purpose. When selecting the capacitor for this filter, a polypropylene film capacitor is highly recommended.
  • Operational Amplifier Selection: The following specifications are critical when selecting operational amplifiers for the proposed reference signal chains (Figure 8-1 and Figure 8-2):
    • Voltage noise
    • Current noise
    • Voltage offset
    • Bias current offset
    • Output impedance

    The impact of these characteristics at each stage of the signal chain is described below:

    • Amp (A): Op-amp (A) acts as the gain stage to generate high voltage reference inputs (up to 21V) for DAC90802 using low-voltage reference ICs
      • Voltage Noise and Offset: The gain configuration of the op amp directly translates the input-referred noise and offset to the output. A low-pass filter placed after this stage helps eliminate thermal noise, leaving flicker noise as the critical specification for op amp selection.
      • Bias Current: The bias current noise, and offset translate to the output voltage noise and offset through the op amp's feedback resistor
    • Amp (B): Op-amps (B) serve as the DAC reference buffers and require low output impedance across the operating frequency
      • Voltage Noise and Offset: The op amp's voltage noise and offset translate directly to the DAC's output noise and offset
      • Bias Current Noise and Offset: The noise and offset from the bias current translate to the DAC's output voltage noise and offset through the first-order low-pass filter (comprising the resistor and capacitor) in the signal chain. Additionally, place a capacitor between the VREFN_F and VREFN_S pins of a channel to filter the thermal noise generated by inversion resistor

Table 8-1, Table 8-2 and Table 8-3 provide recommendations for voltage-reference devices, op amp, and signal-chain configuration, respectively.

As an example, select OPA189 as AMP (A), followed by OPA828 as AMP (B). OPA189 provides low offset voltage and low flicker noise, making the gain stage appropriate. The subsequent low-pass filter helps minimize low thermal-noise contribution, while OPA828 is selected as AMP (B) to provide low-noise signal buffering and drive capability.

Table 8-1 Voltage Reference Device Recommendation
REF IC VREF(V) Thermal Noise (nV/√Hz) Flicker Noise (µVPP) Initial Tolerance (%) Temp Drift (ppm/°C)
REF54(CNR: 1µF) 5 5 1.2 ±0.02 0.8
REF70 5 20 1.15 ±0.025 2
REF81 10 60 1.2 ±0.1 0.1
Table 8-2 Operational Amplifier Recommendation
OP-AMP Offset (µV) Bias Current (pA) Voltage Thermal Noise (nV/√Hz) Flicker Noise (µVPP) Current Thermal Noise(pA/√Hz))
OPA828 ±50 ±1 4 0.34 0.0012
OPA189 ±0.4 ±70 5.2 0.1 0.165
OPA182 ±0.45 ±50 5.7 0.119 0.165
OPA1611 ±100 ±60000 1.1 0.1 1.7
Table 8-3 Signal Chain Recommendation
REF IC GAIN AMP (A) AMP (B) VREF(V) ESTIMATED VREF_Px/VREF_Nx THERMAL NOISE (nV/√Hz ESTIMATED VREF_Px/VREF_Nx FLICKER NOISE (0.1Hz TO 10Hz) (μVPP)
REF54 (CNR:1μF) 1 × OPA189 OPA828 5 4.33 1.25
REF54 (CNR:1μF) 2 × OPA189 OPA828 10 4.33 2.5
REF54 (CNR:1μF) 4 × OPA189 OPA828 20 4.33 5
REF70 1 × OPA189 OPA828 5 4.33 1.18
REF70 2 × OPA189 OPA828 10 4.33 2.36
REF70 4 × OPA189 OPA828 20 4.33 4.72
REF81 1 × OPA189 OPA828 10 4.33 1.7
REF81 2 × OPA189 OPA828 20 4.33 3.36