SLASFM6 October   2026 TAS2573

ADVANCE INFORMATION  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Timing Requirements
    7. 5.7 Timing Diagrams
    8. 5.8 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Device Functional Modes
      1. 6.3.1 Operational Modes
        1. 6.3.1.1 Hardware Shutdown
        2. 6.3.1.2 Software Power Modes Control and Software Reset
        3. 6.3.1.3 Efficiency and power saving modes
          1. 6.3.1.3.1 Noise Gate
          2. 6.3.1.3.2 Music Efficiency Mode
          3. 6.3.1.3.3 VDD Y-bridge
          4. 6.3.1.3.4 Class-H Boost
        4. 6.3.1.4 2S Battery Mode
        5. 6.3.1.5 Low voltage battery mode
        6. 6.3.1.6 External PVDD Mode
      2. 6.3.2 Faults and Status
        1. 6.3.2.1 Interrupt generation and clearing
    4. 6.4 Feature Description
      1. 6.4.1 PurePath™ Console 3 Software
      2. 6.4.2 Playback Signal Path
        1. 6.4.2.1 Digital Signal Processor
          1. 6.4.2.1.1 Algorithm Blocks
          2. 6.4.2.1.2 Algorithm Features
          3. 6.4.2.1.3 Factory Calibration
        2. 6.4.2.2 Digital Volume Control and Amplifier Output Level
        3. 6.4.2.3 High Pass Filter
        4. 6.4.2.4 Class-D Amplifier
        5. 6.4.2.5 Supply Tracking Limiters with Brown Out Prevention
          1. 6.4.2.5.1 Voltage Limiter and Clipping protection
        6. 6.4.2.6 Tone Generator
      3. 6.4.3 Digital Audio Serial Interface
      4. 6.4.4 Boost
      5. 6.4.5 Speaker current and voltage (IV) sensing
      6. 6.4.6 Supply Voltage Monitors
      7. 6.4.7 Thermal Protection
      8. 6.4.8 Clocks and PLL
        1. 6.4.8.1 Auto clock based wakeup and clock errors
      9. 6.4.9 Digital IO pins
    5. 6.5 Programming
      1. 6.5.1 I2C Control Interface
      2. 6.5.2 I2C Address Selection
      3. 6.5.3 General I2C Operation
      4. 6.5.4 I2C Single-Byte and Multiple-Byte Transfers
      5. 6.5.5 I2C Single-Byte Write
      6. 6.5.6 I2C Multiple-Byte Write
      7. 6.5.7 I2C Single-Byte Read
      8. 6.5.8 I2C Multiple-Byte Read
  8. 7 Register Maps
    1. 7.1 PAGE_0 Registers
    2. 7.2 PAGE_1 Registers
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Mono/Stereo Configuration
        2. 8.2.2.2 Boost Converter Passive Devices
        3. 8.2.2.3 EMI Passive Devices
        4. 8.2.2.4 Miscellaneous Passive Devices
      3. 8.2.3 Application Performance Plots
      4. 8.2.4 What to Do and What Not to Do
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  10. 9 Revision History
  11. 10Device and Documentation Support
    1. 10.1 Documentation Support
      1. 10.1.1 Related Documentation
    2. 10.2 Receiving Notification of Documentation Updates
    3. 10.3 Support Resources
    4. 10.4 Trademarks
    5. 10.5 Electrostatic Discharge Caution
    6. 10.6 Glossary
  12. 11Mechanical, Packaging, and Orderable Information
    1. 11.1 Package Option Addendum
    2. 11.2 Tape and Reel Information

Features

  • Powerful class-D amplifier
    • 8.5W 1% THD+N (8Ω at 4.4V)
    • 8.8W 1% THD+N (4Ω at 4.4V)
    • 15V boost with 5.1A max current limit
  • Best in class efficiency
    • Upto 89% efficiency at system level for 8Ω load
    • 19mW idle channel power in active mode
    • 5.5mW idle channel power in Noise gate mode
    • Integrated 1.8V Y-bridge and 33mV step class-H
  • High performance audio channel
    • 4.2µV A-wt. idle channel noise
    • 114dB Dynamic Range
    • -90dB THDN
    • Low EMI performance with ERC and SSM
    • < 1µs chip to chip group delay matching
  • Advanced integrated features
    • Speaker Protection and Advanced Battery Guard with integrated IV sense
    • Audio tuning with EQ, DRC, DEQ
    • Speaker Rattle Noise Suppression algorithm
    • Signal detection high efficiency modes
    • High accuracy voltage monitor & temp sensor
  • Ease of use features
    • 1cell, 2cell and 3cell Li-ion battery support
    • Clock based power up/down
    • Auto clock rate detection: 16kHz to 192kHz
    • External 14V PVDD supply support
    • MCLK free operation
    • Thermal and over current protection
    • Programmable drive strength IO buffers
  • Power Supplies and user interface
    • VBAT: 2.0V to 5.5V
    • VDD: 1.65V to 1.95V
    • IOVDD: 1.2V or 1.8V
    • VBAT_SNS: 2.0V to 10.0V
    • PVDD: 2.5V to 14V (Ext. PVDD mode)
    • I2S/TDM: 8 channels
    • I2C: 4 selectable addresses
  • 48-Ball, 0.35mm Pitch, WCSP package