SLUUDM5 March   2026 MSPM0G1507 , MSPM0G1519 , MSPM0G3507 , MSPM0G3519

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1 Introduction
  5. 2 Motor Control Theory
    1. 2.1 BLDC Motor Fundamentals
    2. 2.2 Mathematical Model and FOC Structure
    3. 2.3 Sensorless Field Oriented Control
      1. 2.3.1 FOC Fundamentals
      2. 2.3.2 Enhanced Sliding Mode Observer
      3. 2.3.3 Finite Difference BEMF Estimator
      4. 2.3.4 Rotor Position and Speed Estimation
  6. 3 MSP FOC System
    1. 3.1 Design Source
    2. 3.2 FOC Feature Overview
    3. 3.3 FOC Benchmark
  7. 4 MSP FOC Hardware
    1. 4.1 PWM Pin Configurations
    2. 4.2 ADC Pin Configurations
      1. 4.2.1 DC Bus Voltage
      2. 4.2.2 Motor Phase Voltage
      3. 4.2.3 Motor Phase Current
        1. 4.2.3.1 Single Shunt Current Sensing
        2. 4.2.3.2 Dual or Three Shunt Current Sensing
        3. 4.2.3.3 Three Shunt Current Sensing with Simultaneous Sampling
    3. 4.3 Fault Pin Configurations
    4. 4.4 Hall GPIO Pin Configurations
    5. 4.5 GPIO Pin Configurations
    6. 4.6 SPI Pin Configurations
    7. 4.7 UART Pin Configurations
    8. 4.8 External Connections for Evaluation Boards
  8. 5 MSP FOC Software
    1. 5.1 Project Structure
    2. 5.2 Software Overview
      1. 5.2.1 Application Layer
        1. 5.2.1.1 FOC Library
        2. 5.2.1.2 Motor Control Application
        3. 5.2.1.3 Main Application
      2. 5.2.2 HAL Layer
        1. 5.2.2.1 Gate Driver Interface
        2. 5.2.2.2 Current Sensing Circuit
        3. 5.2.2.3 Hardware Interface
        4. 5.2.2.4 Communication Interface
      3. 5.2.3 MSPM0 Driverlib Layer
    3. 5.3 Register Map (Sensorless FOC)
      1. 5.3.1 User Control Registers (Base Address = 0x20200400h)
        1. 5.3.1.1 Speed Control Register (Offset = 0h) [Reset = 00000000h]
        2. 5.3.1.2 Algo Debug Control 1 Register (Offset = 4h) [Reset = 00000000h]
        3. 5.3.1.3 Algo Debug Control 2 Register (Offset = 8h) [Reset = 00000000h]
        4. 5.3.1.4 Algo Debug Control 3 Register (Offset = Ch) [Reset = 00000000h]
        5. 5.3.1.5 DAC Configuration Register (Offset = 10h) [Reset = 00000000h]
      2. 5.3.2 User Input Registers (Base Address = 0x20200000h)
        1. 5.3.2.1  SYSTEM_PARAMETERS (Offset = 0h)
        2. 5.3.2.2  MOTOR_STARTUP1 Register (Offset = 3Ch) [Reset = 00000000h]
        3. 5.3.2.3  MOTOR_STARTUP2 Register (Offset = 40h) [Reset = 00000000h]
        4. 5.3.2.4  CLOSED_LOOP1 Register (Offset = 44h) [Reset = 00000000h]
        5. 5.3.2.5  CLOSED_LOOP2 Register (Offset = 48h) [Reset = 00000000h]
        6. 5.3.2.6  FIELD_CTRL Register (Offset = 4Ch) [Reset = 00000000h]
        7. 5.3.2.7  FAULT_CONFIG1 Register (Offset = 50h) [Reset = 00000000h]
        8. 5.3.2.8  FAULT_CONFIG2 Register (Offset = 54h) [Reset = 00000000h]
        9. 5.3.2.9  MISC_ALGO Register (Offset = 58h) [Reset = 00000000h]
        10. 5.3.2.10 PIN_CONFIG Register (Offset = 5Ch) [Reset = 00000000h]
        11. 5.3.2.11 PERI_CONFIG Register (Offset = 60h) [Reset = 00000000h]
      3. 5.3.3 User Status Registers (Base Address = 0x20200430h)
  9. 6 Quick Start Guide
    1. 6.1 CCS IDE
      1. 6.1.1 Project Setup
      2. 6.1.2 Project Debug
    2. 6.2 GUI
  10. 7 Motor Tuning Guide
    1. 7.1 Hardware Board Parameter
      1. 7.1.1 Base Voltage (V)
      2. 7.1.2 Base Current (A)
    2. 7.2 Motor Parameter
      1. 7.2.1 Motor Phase Resistance (mΩ)
      2. 7.2.2 Motor Phase Inductance (μH)
      3. 7.2.3 Saliency of IPMSM Motor
      4. 7.2.4 Motor Pole Pairs
      5. 7.2.5 Motor BEMF Constant (mV/Hz)
      6. 7.2.6 Maximum Motor Electrical Speed (Hz)
      7. 7.2.7 Maximum Motor Power (W)
    3. 7.3 Control Loop Parameter
      1. 7.3.1 Speed / Power Loop
      2. 7.3.2 Current Loop
    4. 7.4 Hall Angle Table
      1. 7.4.1 Hall Calibration
      2. 7.4.2 Register Table
    5. 7.5 Spin the Motor (LVBLDC)
    6. 7.6 Spin the Motor with Hall Sensor
    7. 7.7 Tune the Motor (LVBLDC)
      1. 7.7.1 Basic Tuning
        1. 7.7.1.1  Startup Mode
          1. 7.7.1.1.1 Align Mode
            1. 7.7.1.1.1.1 Force Align Mode in Current Loop
            2. 7.7.1.1.1.2 Force Align Mode in PWM Loop
          2. 7.7.1.1.2 Double Align Mode
          3. 7.7.1.1.3 Initial Position Detection (IPD) Mode
            1. 7.7.1.1.3.1 High Resolution IPD
          4. 7.7.1.1.4 Slow First Cyle (SFC) Mode
        2. 7.7.1.2  Open Loop Mode
          1. 7.7.1.2.1 Auto Handoff
          2. 7.7.1.2.2 Force Open Loop Mode
        3. 7.7.1.3  Transition From Open Loop to Closed Loop
        4. 7.7.1.4  Closed Loop Mode
          1. 7.7.1.4.1 Tune Control Parameter
          2. 7.7.1.4.2 Tune PI Parameter
        5. 7.7.1.5  Stop Mode
          1. 7.7.1.5.1 Coast (Hi-Z) Mode
          2. 7.7.1.5.2 Active Spin Down Mode
          3. 7.7.1.5.3 Braking Mode
            1. 7.7.1.5.3.1 Low-Side Braking
            2. 7.7.1.5.3.2 Align Braking
        6. 7.7.1.6  Fault Handling
          1. 7.7.1.6.1 MOTOR_STALL
            1. 7.7.1.6.1.1 ABN_SPEED_FAULT
            2. 7.7.1.6.1.2 ABN_BEMF_FAULT
            3. 7.7.1.6.1.3 NO_MOTOR_FAULT
          2. 7.7.1.6.2 VOLTAGE_OUT_OF_BOUNDS
          3. 7.7.1.6.3 LOAD_STALL
          4. 7.7.1.6.4 HARDWARE_OVER_CURRENT
          5. 7.7.1.6.5 HV_DIE
        7. 7.7.1.7  Motor Spin Direction
        8. 7.7.1.8  PWM Configuration
          1. 7.7.1.8.1 PWM Frequency
          2. 7.7.1.8.2 PWM Deadband Time
        9. 7.7.1.9  FOC Loop Frequency
        10. 7.7.1.10 Hardcode for Basic Tuning
      2. 7.7.2 Advanced Tuning
        1. 7.7.2.1 Control Mode Setting
          1. 7.7.2.1.1 Closed Loop Speed Control Mode
          2. 7.7.2.1.2 Closed Loop Power Control Mode
          3. 7.7.2.1.3 Closed Loop Torque Control Mode
          4. 7.7.2.1.4 Open Loop Voltage Control Mode
            1. 7.7.2.1.4.1 Lead Angle Control
        2. 7.7.2.2 Maximum Torque Per Ampere (MTPA) Control
        3. 7.7.2.3 Field Weakening Control (FWC)
        4. 7.7.2.4 Deadtime Compensation
        5. 7.7.2.5 PWM Generation Mode
        6. 7.7.2.6 Overmodulation Mode
        7. 7.7.2.7 Initial Speed Detection (ISD) Mode
          1. 7.7.2.7.1 Motor Resynchronization
          2. 7.7.2.7.2 Reverse Drive
          3. 7.7.2.7.3 Fast ISD
        8. 7.7.2.8 Anti-Voltage Surge
    8. 7.8 Overwrite User Input Register Table
  11. 8 Hardware Migration Guide
    1. 8.1 Hardware Layer Overview
    2. 8.2 Gate Driver Module
      1. 8.2.1 Select Reference Projects
      2. 8.2.2 Modify Pre-defined Symbols
      3. 8.2.3 Add Custom Source Files
        1. 8.2.3.1 Gate Driver Comm Folder
        2. 8.2.3.2 HAL Layer File
      4. 8.2.4 Add Custom Comm Interface
      5. 8.2.5 Overwrite Default Macro Definitions
        1. 8.2.5.1 main.h File
          1. 8.2.5.1.1 Delay Component in Current Sensing Path
        2. 8.2.5.2 gateDriver.h File
    3. 8.3 MCU Peripheral Configuration
      1. 8.3.1 PWM Module
        1. 8.3.1.1 Different Pin Used for PWM Output
        2. 8.3.1.2 Different Pin Used for PWM Fault Input
        3. 8.3.1.3 Different Mapping to PWM Output Channel
      2. 8.3.2 ADC Module
        1. 8.3.2.1 Current Sensing Type
        2. 8.3.2.2 Current Sensing Method
          1. 8.3.2.2.1 Three Shunt Configuration
          2. 8.3.2.2.2 Three Shunt Configuration with Simultaneously Sampling
          3. 8.3.2.2.3 Dual Shunt Configuration
          4. 8.3.2.2.4 Single Shunt Configuration
        3. 8.3.2.3 CSA Offset Scaling Factor
        4. 8.3.2.4 Channel Mapping
          1. 8.3.2.4.1 Phase Current Channels
            1. 8.3.2.4.1.1 Three Shunt Configuration
            2. 8.3.2.4.1.2 Dual Shunt Configuration
            3. 8.3.2.4.1.3 Single Shunt Configuration
          2. 8.3.2.4.2 Bus Voltage Channel
          3. 8.3.2.4.3 Phase Voltage Channels
        5. 8.3.2.5 Trigger Mode
          1. 8.3.2.5.1 Three or Dual Shunt Configuration
          2. 8.3.2.5.2 Single Shunt Configuration
      3. 8.3.3 GPIO Pin
      4. 8.3.4 HALL Module
      5. 8.3.5 UART Module
      6. 8.3.6 DAC12 Module
      7. 8.3.7 IPD Module (Capture Timer)
    4. 8.4 Verification for Customized Board
  12. 9 Frequently Asked Questions (FAQs)
    1. 9.1 MSPM0 Failed to Connect
    2. 9.2 Spin the Motor in Hardcode
    3. 9.3 Reduce 1x ADC Pin for Simultaneously Sampling
    4. 9.4 Tune Real-time Control Parameter
    5. 9.5 Track Real-time Variable
      1. 9.5.1 DAC12 Output
      2. 9.5.2 J-Scope Tool
  13. 10Summary
  14. 11References
  15. 12Revision History

8.4 Verification for Customized Board

Once the FOC project has been successfully migrated to match your hardware configuration, follow these steps to verify software functionality.

ADC Interrupt Verification

The ADC interrupt serves as the critical task for the FOC application, responsible for reading motor phase currents and executing the FOC algorithm. Users can set a breakpoint (or GPIO toggle) in FOC_ADC_ISR() to verify that the ADC interrupt trigger frequency aligns with the expected FOC loop frequency.

In IDLE state, ADC memory index registers are periodically updated with conversion results that reflect the hardware circuit's baseline conditions. These values establish proper reference readings prior to motor operation. For instance, applying 1.65V to the ADC phase current input channel yields an ADC memory index register value of approximately 2047.

Check the following configurations if the ADC interrupt is not triggered:

  • Add FOC_ISR_ADC1 macro if use ADC1 interrupt

  • Verify the proper PWM/Timer trigger event is set for ADC conversion

  • Verify one proper ADC interrupt trigger event is set for ADC module

Check the following configurations if the ADC interrupt occurs at an unexpected frequency:

  • Verify proper ADC trigger mode is set for each ADC memory index

  • Verify one proper ADC interrupt trigger event is set for ADC module

  • Sensorless/Universal FOC supports max 10kHz ADC interrupt and Sensored FOC supports max 16kHz ADC interrupt

Check the following configurations if the ADC conversion value is unexpected:

  • Verify motor phase A/B/C current input signal (to ADC channel) is correct

  • Verify the proper PWM/Timer trigger event is set for ADC conversion

PWM Output and Phase Current Input Mapping

The FOC application uses U/V/W to represent motor phases A/B/C respectively. Although there are no restrictions on maintaining the default relationships, users must ensure proper alignment between PWM outputs and phase current inputs.

For example, if your hardware circuit assigns:

  • FOC_PWMA0_U_IDX -> Motor Phase B

  • FOC_PWMA0_V_IDX -> Motor Phase A

Then you must configure the motor phase current accordingly:

  • Motor Phase B ADC Input Channel -> ADCx_CURRENT_U_CH

  • Motor Phase A ADC Input Channel -> ADCx_CURRENT_V_CH

This ensures the PWM-to-Current relationship remains consistent. If mistached, the current close loop function fails when running FOC application.

Gate Driver Output Verification

Follow the steps below to verify gate driver output:

  • Disconnect the motor

  • Use a scope to observe the three-phase PWM output

  • Configure the FOC application to run in Force Align Mode with PWM Loop (Section 7.7.1.1.1.2)

  • Set a non-zero value to FORCE_VQ_CURRENT_ LOOP_DIS or FORCE_VQ_CURRENT_ LOOP_DIS

  • Set a non-zero value to speedInput to start FOC statemachine

  • Validate that three-phase PWM outputs follow the SVPWM pattern (Figure 7-19)

  • Validate that the three PWM outputs follow the defined sequence with motor phases

Current Sensing Circuit Verification

Follow the steps below to verify motor phase current sensing circuit:

  • Connect the motor

  • Configure the DC voltage source output and set the current limit to an appropriate value, typically below the motor's rated current specification

  • Use a current probe to monitor one motor phase current and a voltage probe to monitor this motor phase current signal at the ADC input channel

  • Configure the FOC application to run in Force Align Mode with Current Loop (Section 7.7.1.1.1.1)

  • Set appropriate align time and align current parameters

  • Set a non-zero value to speedInput to start FOC statemachine

  • Validate that the motor phase current follows the Align Mode pattern (Figure 7-17)

  • Validate that the motor phase current amplitude match the align mode parameters

Check below configurations if the align current verification fails:

Current Control Loop Verification

Follow the steps below to verify current control loop:

  • Validate the current sensing circuit works fine

  • Use a current probe to monitor one motor phase current and a voltage probe to monitor this motor phase current signal at the ADC input channel

  • Configure the FOC application to run in Force Open Loop (Section 7.7.1.2.2)

  • Set appropriate align mode parameters (typically set align current to 0h for unloaded motors)

  • Set proper open loop current and acceleration rate parameters (typically set open loop current to 0h for unloaded motors)

  • Set handoff threshold to 20-30% of motor rated speed

  • Configure current control loop parameters, recommend to start with auto calculated parameters (Section 7.3.2)

  • Set a non-zero value to speedInput to start FOC statemachine

  • Validate that the motor phase current follows the Open Loop Mode pattern (Figure 7-21) and is a clean sine wave

  • Validate that the motor phase current amplitude and frequency match the open loop parameters

Check the following configurations if the open loop verification fails:

  • Check the motor phase current signal at ADC input channel (scaled) match the current probe signal

  • Check current loop PI parameters (See Section 7.3.2)

  • Refer to Track Real-time Variable to monitor the ADC raw data and verify whether the raw ADC data matches a sine waveform.

Note:

Once hardware functionality is verified through these steps, refer to Tune the LVBLDC Motor to begin comprehensive motor tuning with all available features.