SNAU308A November   2024  – May 2025

 

  1.   1
  2.   Description
  3.   Get Started
  4.   Features
  5.   Applications
  6.   6
  7. 1Evaluation Module Overview
    1. 1.1 Introduction
    2. 1.2 Kit Contents
    3. 1.3 Specification
    4. 1.4 Device Information
  8. 2Hardware
    1. 2.1 Setup
      1. 2.1.1 Evaluation Setup Requirement
      2. 2.1.2 Connection Diagram
    2. 2.2 Jumper Information
    3. 2.3 Power Requirements
    4. 2.4 Reference Clock
    5. 2.5 Output Connections
    6. 2.6 Test Points
  9. 3Software
    1. 3.1 Software Description
    2. 3.2 Software Installation
    3. 3.3 USB2ANY Interface
  10. 4Implementation Results
    1. 4.1 Evaluation Setup
    2. 4.2 Performance Data and Results
      1. 4.2.1 RF Output
      2. 4.2.2 VCO Calibration
        1. 4.2.2.1 No Assist Operation
        2. 4.2.2.2 Full Assist Operation
      3. 4.2.3 SYSREF
        1. 4.2.3.1 SYSREF Clock Generation
        2. 4.2.3.2 SYSREF Pulse Generation
        3. 4.2.3.3 SYSREF Repeater Mode
      4. 4.2.4 Phase Adjustment
      5. 4.2.5 Phase Synchronization
        1. 4.2.5.1 Category 1b and Category 2 SYNC
        2. 4.2.5.2 Category 3 SYNC
      6. 4.2.6 Pin Mode
  11. 5Hardware Design Files
    1. 5.1 Schematics
    2. 5.2 PCB Layouts
    3. 5.3 Bill of Materials (BOM)
  12. 6Additional Information
    1. 6.1 Debug Information
    2. 6.2 Trademarks
  13. 7Revision History

4.2.2.1 No Assist Operation

With No Assist operation, the time taken to switch VCO frequency is equal to the sum of (1) register programming time, (2) VCO calibration time and (3) PLL lock time. VCO calibration time depends on whether the frequency change is upward or downward as well as register VCO_SEL, VCO_DACISET and VCO_CAPCTRL setting. PLL lock time depends on the loop filter bandwidth. In general, wider loop bandwidth returns shorter lock time. For example, using default EVM configuration to switch VCO frequency between 7500MHz (VCO1) and 15GHz (VCO7) with No Assist operation, the lock time (excluding register programming time) is approximately 300µs to 600µs. (Output is divide by 4 due to limitation of test equipment)

LMX2624SPEVM LMX2695SEPEVM LMX2824EPEVM No Assist Jump DownFigure 4-13 No Assist Jump Down
LMX2624SPEVM LMX2695SEPEVM LMX2824EPEVM No Assist Jump UpFigure 4-14 No Assist Jump Up
Programming information:
  1. Set DBL_BUF_EN = 1 to enable register double buffering. Writing to the double-buffered registers do not change the configuration of the PLL until register R0 is programmed.
  2. Set Channel divider = 4.
  3. Program PFD_DLY, PLL_N, PLL_NUM for VCO = 7500MHz.
  4. Click Calibrate VCO button once to initiate VCO calibration. (Use the CSB pin to trigger test equipment)
  5. Repeat step 3 for VCO = 15000MHz.
  6. Click Calibrate VCO button once to initiate VCO calibration. (Use the CSB pin to trigger test equipment)
LMX2624SPEVM LMX2695SEPEVM LMX2824EPEVM No Assist VCO Switching Configuration Figure 4-15 No Assist VCO Switching Configuration